diff options
Diffstat (limited to 'arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi')
| -rw-r--r-- | arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi new file mode 100644 index 0000000000..c229e82de9 --- /dev/null +++ b/arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2014-2015, 2020 Intel. All rights reserved. + */ + +#include "socfpga_arria10_socdk_sdmmc_handoff.dtsi" +#include "socfpga_arria10_handoff_u-boot.dtsi" +#include "socfpga_arria10_socdk-u-boot.dtsi" + +/ { + chosen { + firmware-loader = <&fs_loader0>; + }; + + fs_loader0: fs-loader { + u-boot,dm-pre-reloc; + compatible = "u-boot,fs-loader"; + phandlepart = <&mmc 1>; + }; +}; + +&fpga_mgr { + u-boot,dm-pre-reloc; + altr,bitstream = "fit_spl_fpga.itb"; +}; + +&mmc { + u-boot,dm-pre-reloc; +}; + +/* Clock available early */ +&main_sdmmc_clk { + u-boot,dm-pre-reloc; +}; + +&peri_sdmmc_clk { + u-boot,dm-pre-reloc; +}; + +&sdmmc_free_clk { + u-boot,dm-pre-reloc; +}; + +&sdmmc_clk { + u-boot,dm-pre-reloc; +}; |