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Diffstat (limited to 'arch/arm/dts/stm32f769-disco.dts')
-rw-r--r--arch/arm/dts/stm32f769-disco.dts236
1 files changed, 60 insertions, 176 deletions
diff --git a/arch/arm/dts/stm32f769-disco.dts b/arch/arm/dts/stm32f769-disco.dts
index a23d02d300..483d896e2b 100644
--- a/arch/arm/dts/stm32f769-disco.dts
+++ b/arch/arm/dts/stm32f769-disco.dts
@@ -1,5 +1,5 @@
/*
- * Copyright 2016 - Vikas Manocha <vikas.manocha@st.com>
+ * Copyright 2017 - Vikas MANOCHA <vikas.manocha@st.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
@@ -42,15 +42,16 @@
/dts-v1/;
#include "stm32f746.dtsi"
-#include <dt-bindings/memory/stm32-sdram.h>
+#include "stm32f769-pinctrl.dtsi"
+#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
/ {
model = "STMicroelectronics STM32F769-DISCO board";
- compatible = "st,stm32f769-disco", "st,stm32f7";
+ compatible = "st,stm32f769-disco", "st,stm32f769";
chosen {
- bootargs = "root=/dev/ram rdinit=/linuxrc";
+ bootargs = "root=/dev/ram";
stdout-path = "serial0:115200n8";
};
@@ -60,207 +61,90 @@
aliases {
serial0 = &usart1;
- spi0 = &qspi;
- mmc0 = &sdio2;
- /* Aliases for gpios so as to use sequence */
- gpio0 = &gpioa;
- gpio1 = &gpiob;
- gpio2 = &gpioc;
- gpio3 = &gpiod;
- gpio4 = &gpioe;
- gpio5 = &gpiof;
- gpio6 = &gpiog;
- gpio7 = &gpioh;
- gpio8 = &gpioi;
- gpio9 = &gpioj;
- gpio10 = &gpiok;
};
- led1 {
- compatible = "st,led1";
- led-gpio = <&gpioj 5 0>;
- };
-
- button1 {
- compatible = "st,button1";
- button-gpio = <&gpioa 0 0>;
- };
-};
-
-&clk_hse {
- clock-frequency = <25000000>;
-};
-
-&pinctrl {
- usart1_pins_a: usart1@0 {
- pins1 {
- pinmux = <STM32F746_PA9_FUNC_USART1_TX>;
- bias-disable;
- drive-push-pull;
- slew-rate = <2>;
+ leds {
+ compatible = "gpio-leds";
+ green {
+ gpios = <&gpioj 5 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
};
- pins2 {
- pinmux = <STM32F746_PA10_FUNC_USART1_RX>;
- bias-disable;
+ red {
+ gpios = <&gpioj 13 GPIO_ACTIVE_HIGH>;
};
};
- ethernet_mii: mii@0 {
- pins {
- pinmux = <STM32F746_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0>,
- <STM32F746_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1>,
- <STM32F746_PG11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN>,
- <STM32F746_PA2_FUNC_ETH_MDIO>,
- <STM32F746_PC1_FUNC_ETH_MDC>,
- <STM32F746_PA1_FUNC_ETH_MII_RX_CLK_ETH_RMII_REF_CLK>,
- <STM32F746_PA7_FUNC_ETH_MII_RX_DV_ETH_RMII_CRS_DV>,
- <STM32F746_PC4_FUNC_ETH_MII_RXD0_ETH_RMII_RXD0>,
- <STM32F746_PC5_FUNC_ETH_MII_RXD1_ETH_RMII_RXD1>;
- slew-rate = <2>;
- };
- };
-
- qspi_pins: qspi@0 {
- pins {
- pinmux = <STM32F746_PB2_FUNC_QUADSPI_CLK>,
- <STM32F746_PB6_FUNC_QUADSPI_BK1_NCS>,
- <STM32F746_PC9_FUNC_QUADSPI_BK1_IO0>,
- <STM32F746_PC10_FUNC_QUADSPI_BK1_IO1>,
- <STM32F746_PD13_FUNC_QUADSPI_BK1_IO3>,
- <STM32F746_PE2_FUNC_QUADSPI_BK1_IO2>;
- slew-rate = <2>;
+ gpio_keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ autorepeat;
+ button@0 {
+ label = "User";
+ linux,code = <KEY_HOME>;
+ gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>;
};
};
- fmc_pins: fmc@0 {
- pins {
- pinmux = <STM32F746_PI10_FUNC_FMC_D31>,
- <STM32F746_PI9_FUNC_FMC_D30>,
- <STM32F746_PI7_FUNC_FMC_D29>,
- <STM32F746_PI6_FUNC_FMC_D28>,
- <STM32F746_PI3_FUNC_FMC_D27>,
- <STM32F746_PI2_FUNC_FMC_D26>,
- <STM32F746_PI1_FUNC_FMC_D25>,
- <STM32F746_PI0_FUNC_FMC_D24>,
- <STM32F746_PH15_FUNC_FMC_D23>,
- <STM32F746_PH14_FUNC_FMC_D22>,
- <STM32F746_PH13_FUNC_FMC_D21>,
- <STM32F746_PH12_FUNC_FMC_D20>,
- <STM32F746_PH11_FUNC_FMC_D19>,
- <STM32F746_PH10_FUNC_FMC_D18>,
- <STM32F746_PH9_FUNC_FMC_D17>,
- <STM32F746_PH8_FUNC_FMC_D16>,
-
- <STM32F746_PD10_FUNC_FMC_D15>,
- <STM32F746_PD9_FUNC_FMC_D14>,
- <STM32F746_PD8_FUNC_FMC_D13>,
- <STM32F746_PE15_FUNC_FMC_D12>,
- <STM32F746_PE14_FUNC_FMC_D11>,
- <STM32F746_PE13_FUNC_FMC_D10>,
- <STM32F746_PE12_FUNC_FMC_D9>,
- <STM32F746_PE11_FUNC_FMC_D8>,
- <STM32F746_PE10_FUNC_FMC_D7>,
- <STM32F746_PE9_FUNC_FMC_D6>,
- <STM32F746_PE8_FUNC_FMC_D5>,
- <STM32F746_PE7_FUNC_FMC_D4>,
- <STM32F746_PD1_FUNC_FMC_D3>,
- <STM32F746_PD0_FUNC_FMC_D2>,
- <STM32F746_PD15_FUNC_FMC_D1>,
- <STM32F746_PD14_FUNC_FMC_D0>,
-
- <STM32F746_PI5_FUNC_FMC_NBL3>,
- <STM32F746_PI4_FUNC_FMC_NBL2>,
- <STM32F746_PE1_FUNC_FMC_NBL1>,
- <STM32F746_PE0_FUNC_FMC_NBL0>,
-
- <STM32F746_PG5_FUNC_FMC_A15_FMC_BA1>,
- <STM32F746_PG4_FUNC_FMC_A14_FMC_BA0>,
-
- <STM32F746_PG1_FUNC_FMC_A11>,
- <STM32F746_PG0_FUNC_FMC_A10>,
- <STM32F746_PF15_FUNC_FMC_A9>,
- <STM32F746_PF14_FUNC_FMC_A8>,
- <STM32F746_PF13_FUNC_FMC_A7>,
- <STM32F746_PF12_FUNC_FMC_A6>,
- <STM32F746_PF5_FUNC_FMC_A5>,
- <STM32F746_PF4_FUNC_FMC_A4>,
- <STM32F746_PF3_FUNC_FMC_A3>,
- <STM32F746_PF2_FUNC_FMC_A2>,
- <STM32F746_PF1_FUNC_FMC_A1>,
- <STM32F746_PF0_FUNC_FMC_A0>,
+ usbotg_hs_phy: usb-phy {
+ #phy-cells = <0>;
+ compatible = "usb-nop-xceiv";
+ clocks = <&rcc 0 STM32F7_AHB1_CLOCK(OTGHSULPI)>;
+ clock-names = "main_clk";
+ };
- <STM32F746_PH3_FUNC_FMC_SDNE0>,
- <STM32F746_PH5_FUNC_FMC_SDNWE>,
- <STM32F746_PF11_FUNC_FMC_SDNRAS>,
- <STM32F746_PG15_FUNC_FMC_SDNCAS>,
- <STM32F746_PH2_FUNC_FMC_SDCKE0>,
- <STM32F746_PG8_FUNC_FMC_SDCLK>;
- slew-rate = <2>;
- };
- };
+ mmc_vcard: mmc_vcard {
+ compatible = "regulator-fixed";
+ regulator-name = "mmc_vcard";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
};
-&usart1 {
- pinctrl-0 = <&usart1_pins_a>;
+&cec {
+ pinctrl-0 = <&cec_pins_a>;
pinctrl-names = "default";
status = "okay";
};
-&fmc {
- pinctrl-0 = <&fmc_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- /* Memory configuration from sdram datasheet MT48LC_4M32_B2B5-6A */
- bank1: bank@0 {
- st,sdram-control = /bits/ 8 <NO_COL_8 NO_ROW_12 MWIDTH_32 BANKS_4
- CAS_3 SDCLK_2 RD_BURST_EN
- RD_PIPE_DL_0>;
- st,sdram-timing = /bits/ 8 <TMRD_2 TXSR_6 TRAS_4 TRC_6 TWR_2
- TRP_2 TRCD_2>;
- /* refcount = (64msec/total_row_sdram)*freq - 20 */
- st,sdram-refcount = < 1542 >;
- };
+&clk_hse {
+ clock-frequency = <25000000>;
};
-&mac {
+&i2c1 {
+ pinctrl-0 = <&i2c1_pins_b>;
+ pinctrl-names = "default";
+ i2c-scl-rising-time-ns = <185>;
+ i2c-scl-falling-time-ns = <20>;
status = "okay";
- pinctrl-0 = <&ethernet_mii>;
- phy-mode = "rmii";
- phy-handle = <&phy0>;
-
- mdio0 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "snps,dwmac-mdio";
- phy0: ethernet-phy@0 {
- reg = <0>;
- };
- };
};
-&qspi {
- pinctrl-0 = <&qspi_pins>;
+&rtc {
status = "okay";
-
- qflash0: n25q128a {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "micron,n25q128a13", "jedec,spi-nor";
- spi-max-frequency = <108000000>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <1>;
- memory-map = <0x90000000 0x1000000>;
- reg = <0>;
- };
};
&sdio2 {
status = "okay";
+ vmmc-supply = <&mmc_vcard>;
cd-gpios = <&gpioi 15 GPIO_ACTIVE_LOW>;
+ broken-cd;
pinctrl-names = "default", "opendrain";
pinctrl-0 = <&sdio_pins_b>;
pinctrl-1 = <&sdio_pins_od_b>;
bus-width = <4>;
- max-frequency = <25000000>;
+};
+
+&usart1 {
+ pinctrl-0 = <&usart1_pins_a>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&usbotg_hs {
+ dr_mode = "otg";
+ phys = <&usbotg_hs_phy>;
+ phy-names = "usb2-phy";
+ pinctrl-0 = <&usbotg_hs_pins_a>;
+ pinctrl-names = "default";
+ status = "okay";
};
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