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-rw-r--r--arch/arm/dts/rk3288-u-boot.dtsi25
-rw-r--r--arch/arm/dts/rk3399-gru-u-boot.dtsi4
-rw-r--r--arch/arm/dts/rk3399-gru.dtsi2
-rw-r--r--arch/arm/dts/rk3399-u-boot.dtsi27
-rw-r--r--arch/arm/dts/rockchip-optee.dtsi64
-rw-r--r--arch/arm/dts/rockchip-u-boot.dtsi10
6 files changed, 130 insertions, 2 deletions
diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
index 51b6e018bd..e3c6c10f13 100644
--- a/arch/arm/dts/rk3288-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -4,6 +4,7 @@
*/
#include "rockchip-u-boot.dtsi"
+#include "rockchip-optee.dtsi"
/ {
chosen {
@@ -12,6 +13,30 @@
};
};
+#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
+&binman {
+ rom {
+ filename = "u-boot.rom";
+ size = <0x400000>;
+ pad-byte = <0xff>;
+
+ mkimage {
+ args = "-n rk3288 -T rkspi";
+ u-boot-spl {
+ };
+ };
+ u-boot-img {
+ offset = <0x20000>;
+ };
+ u-boot {
+ offset = <0x300000>;
+ };
+ fdtmap {
+ };
+ };
+};
+#endif
+
&dmc {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi
index 7bddc3acdb..390ac2bb5a 100644
--- a/arch/arm/dts/rk3399-gru-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi
@@ -4,3 +4,7 @@
*/
#include "rk3399-u-boot.dtsi"
+
+&spi_flash {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3399-gru.dtsi b/arch/arm/dts/rk3399-gru.dtsi
index 7ac88392f2..f9c5bb607b 100644
--- a/arch/arm/dts/rk3399-gru.dtsi
+++ b/arch/arm/dts/rk3399-gru.dtsi
@@ -537,7 +537,7 @@ ap_i2c_audio: &i2c8 {
pinctrl-names = "default", "sleep";
pinctrl-1 = <&spi1_sleep>;
- spiflash@0 {
+ spi_flash: spiflash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 8237782408..ecd230c720 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -4,11 +4,14 @@
*/
#define USB_CLASS_HUB 9
+#include "rockchip-u-boot.dtsi"
+
/ {
aliases {
mmc0 = &sdhci;
mmc1 = &sdmmc;
pci0 = &pcie0;
+ spi1 = &spi1;
};
cic: syscon@ff620000 {
@@ -57,6 +60,30 @@
};
+#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
+&binman {
+ rom {
+ filename = "u-boot.rom";
+ size = <0x400000>;
+ pad-byte = <0xff>;
+
+ mkimage {
+ args = "-n rk3399 -T rkspi";
+ u-boot-spl {
+ };
+ };
+ u-boot-img {
+ offset = <0x40000>;
+ };
+ u-boot {
+ offset = <0x300000>;
+ };
+ fdtmap {
+ };
+ };
+};
+#endif
+
&cru {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/rockchip-optee.dtsi b/arch/arm/dts/rockchip-optee.dtsi
new file mode 100644
index 0000000000..cde9b81b26
--- /dev/null
+++ b/arch/arm/dts/rockchip-optee.dtsi
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Google LLC
+ */
+
+#include <config.h>
+
+#if defined(CONFIG_HAS_ROM) && defined(CONFIG_FIT)
+&binman {
+ itb {
+ filename = "u-boot.itb";
+ fit {
+ fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
+ description = "FIT image with OP-TEE support";
+ #address-cells = <1>;
+
+ images {
+ uboot {
+ description = "U-Boot";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_SYS_TEXT_BASE>;
+
+ u-boot-nodtb {
+ };
+ };
+ optee {
+ description = "OP-TEE";
+ type = "firmware";
+ arch = "arm";
+ os = "tee";
+ compression = "none";
+ load = <(CONFIG_SYS_SDRAM_BASE + 0x8400000)>;
+ entry = <(CONFIG_SYS_SDRAM_BASE + 0x8400000)>;
+
+ blob-ext {
+ filename = "tee.bin";
+ };
+ };
+ fdt {
+ description = CONFIG_SYS_BOARD;
+ type = "flat_dt";
+ compression = "none";
+
+ u-boot-dtb {
+ };
+ };
+ };
+
+ configurations {
+ default = "conf";
+ conf {
+ description = CONFIG_SYS_BOARD;
+ firmware = "optee";
+ loadables = "uboot";
+ fdt = "fdt";
+ };
+ };
+ };
+ };
+};
+#endif
diff --git a/arch/arm/dts/rockchip-u-boot.dtsi b/arch/arm/dts/rockchip-u-boot.dtsi
index a2559e2db0..eae3ee715d 100644
--- a/arch/arm/dts/rockchip-u-boot.dtsi
+++ b/arch/arm/dts/rockchip-u-boot.dtsi
@@ -6,7 +6,14 @@
#include <config.h>
/ {
- binman {
+ binman: binman {
+ multiple-images;
+ };
+};
+
+#ifdef CONFIG_SPL
+&binman {
+ simple-bin {
filename = "u-boot-rockchip.bin";
pad-byte = <0xff>;
@@ -19,3 +26,4 @@
};
};
};
+#endif