diff options
Diffstat (limited to 'arch/arm/include/asm/arch-omap3')
| -rw-r--r-- | arch/arm/include/asm/arch-omap3/clocks.h | 1 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-omap3/clocks_omap3.h | 26 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-omap3/cpu.h | 21 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-omap3/ehci_omap3.h | 58 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-omap3/omap3-regs.h | 95 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-omap3/omap3.h | 14 |
6 files changed, 210 insertions, 5 deletions
diff --git a/arch/arm/include/asm/arch-omap3/clocks.h b/arch/arm/include/asm/arch-omap3/clocks.h index 40f80baf61..bed0002ec0 100644 --- a/arch/arm/include/asm/arch-omap3/clocks.h +++ b/arch/arm/include/asm/arch-omap3/clocks.h @@ -68,6 +68,7 @@ extern dpll_param *get_mpu_dpll_param(void); extern dpll_param *get_iva_dpll_param(void); extern dpll_param *get_core_dpll_param(void); extern dpll_param *get_per_dpll_param(void); +extern dpll_param *get_per2_dpll_param(void); extern dpll_param *get_36x_mpu_dpll_param(void); extern dpll_param *get_36x_iva_dpll_param(void); diff --git a/arch/arm/include/asm/arch-omap3/clocks_omap3.h b/arch/arm/include/asm/arch-omap3/clocks_omap3.h index 30ef690fa2..ef600dd9db 100644 --- a/arch/arm/include/asm/arch-omap3/clocks_omap3.h +++ b/arch/arm/include/asm/arch-omap3/clocks_omap3.h @@ -282,6 +282,32 @@ #define PER_FSEL_38P4 0x07 #define PER_M2_38P4 0x09 +/* PER2 DPLL */ +#define PER2_M_12 0x78 +#define PER2_N_12 0x0B +#define PER2_FSEL_12 0x03 +#define PER2_M2_12 0x01 + +#define PER2_M_13 0x78 +#define PER2_N_13 0x0C +#define PER2_FSEL_13 0x03 +#define PER2_M2_13 0x01 + +#define PER2_M_19P2 0x2EE +#define PER2_N_19P2 0x0B +#define PER2_FSEL_19P2 0x06 +#define PER2_M2_19P2 0x0A + +#define PER2_M_26 0x78 +#define PER2_N_26 0x0C +#define PER2_FSEL_26 0x03 +#define PER2_M2_26 0x01 + +#define PER2_M_38P4 0x2EE +#define PER2_N_38P4 0x0B +#define PER2_FSEL_38P4 0x06 +#define PER2_M2_38P4 0x0A + /* 36XX PER DPLL */ #define PER_36XX_M_12 0x1B0 diff --git a/arch/arm/include/asm/arch-omap3/cpu.h b/arch/arm/include/asm/arch-omap3/cpu.h index 962d6d40aa..e944de7192 100644 --- a/arch/arm/include/asm/arch-omap3/cpu.h +++ b/arch/arm/include/asm/arch-omap3/cpu.h @@ -347,10 +347,13 @@ struct prcm { u32 clksel2_pll_mpu; /* 0x944 */ u8 res6[0xb8]; u32 fclken1_core; /* 0xa00 */ - u8 res7[0xc]; + u32 res_fclken2_core; + u32 fclken3_core; /* 0xa08 */ + u8 res7[0x4]; u32 iclken1_core; /* 0xa10 */ u32 iclken2_core; /* 0xa14 */ - u8 res8[0x28]; + u32 iclken3_core; /* 0xa18 */ + u8 res8[0x24]; u32 clksel_core; /* 0xa40 */ u8 res9[0xbc]; u32 fclken_gfx; /* 0xb00 */ @@ -368,13 +371,17 @@ struct prcm { u32 clksel_wkup; /* 0xc40 */ u8 res16[0xbc]; u32 clken_pll; /* 0xd00 */ - u8 res17[0x1c]; + u32 clken2_pll; /* 0xd04 */ + u8 res17[0x18]; u32 idlest_ckgen; /* 0xd20 */ - u8 res18[0x1c]; + u32 idlest2_ckgen; /* 0xd24 */ + u8 res18[0x18]; u32 clksel1_pll; /* 0xd40 */ u32 clksel2_pll; /* 0xd44 */ u32 clksel3_pll; /* 0xd48 */ - u8 res19[0xb4]; + u32 clksel4_pll; /* 0xd4c */ + u32 clksel5_pll; /* 0xd50 */ + u8 res19[0xac]; u32 fclken_dss; /* 0xe00 */ u8 res20[0xc]; u32 iclken_dss; /* 0xe10 */ @@ -394,6 +401,10 @@ struct prcm { u32 clksel_per; /* 0x1040 */ u8 res28[0xfc]; u32 clksel1_emu; /* 0x1140 */ + u8 res29[0x2bc]; + u32 fclken_usbhost; /* 0x1400 */ + u8 res30[0xc]; + u32 iclken_usbhost; /* 0x1410 */ }; #else /* __ASSEMBLY__ */ #define CM_CLKSEL_CORE 0x48004a40 diff --git a/arch/arm/include/asm/arch-omap3/ehci_omap3.h b/arch/arm/include/asm/arch-omap3/ehci_omap3.h new file mode 100644 index 0000000000..cd01f50295 --- /dev/null +++ b/arch/arm/include/asm/arch-omap3/ehci_omap3.h @@ -0,0 +1,58 @@ +/* + * (C) Copyright 2011 + * Alexander Holler <holler@ahsoftware.de> + * + * Based on "drivers/usb/host/ehci-omap.c" from Linux 2.6.37 + * + * See there for additional Copyrights. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ +#ifndef _EHCI_OMAP3_H_ +#define _EHCI_OMAP3_H_ + +/* USB/EHCI registers */ +#define OMAP3_USBTLL_BASE 0x48062000UL +#define OMAP3_UHH_BASE 0x48064000UL +#define OMAP3_EHCI_BASE 0x48064800UL + +/* TLL Register Set */ +#define OMAP_USBTLL_SYSCONFIG (0x10) +#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1) +#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2) +#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3) +#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8) + +#define OMAP_USBTLL_SYSSTATUS (0x14) +#define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0) + +/* UHH Register Set */ +#define OMAP_UHH_SYSCONFIG (0x10) +#define OMAP_UHH_SYSCONFIG_SOFTRESET (1 << 1) +#define OMAP_UHH_SYSCONFIG_CACTIVITY (1 << 8) +#define OMAP_UHH_SYSCONFIG_SIDLEMODE (1 << 3) +#define OMAP_UHH_SYSCONFIG_ENAWAKEUP (1 << 2) +#define OMAP_UHH_SYSCONFIG_MIDLEMODE (1 << 12) + +#define OMAP_UHH_HOSTCONFIG (0x40) +#define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN (1 << 2) +#define OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN (1 << 3) +#define OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN (1 << 4) + +#endif /* _EHCI_OMAP3_H_ */ diff --git a/arch/arm/include/asm/arch-omap3/omap3-regs.h b/arch/arm/include/asm/arch-omap3/omap3-regs.h new file mode 100644 index 0000000000..818214f466 --- /dev/null +++ b/arch/arm/include/asm/arch-omap3/omap3-regs.h @@ -0,0 +1,95 @@ +/* + * (c) 2011 Comelit Group SpA, Luca Ceresoli <luca.ceresoli@comelit.it> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _OMAP3_REGS_H +#define _OMAP3_REGS_H + +/* + * Register definitions for OMAP3 processors. + */ + +/* + * GPMC_CONFIG1 - GPMC_CONFIG7 + */ + +/* Values for GPMC_CONFIG1 - signal control parameters */ +#define WRAPBURST (1 << 31) +#define READMULTIPLE (1 << 30) +#define READTYPE (1 << 29) +#define WRITEMULTIPLE (1 << 28) +#define WRITETYPE (1 << 27) +#define CLKACTIVATIONTIME(x) (((x) & 3) << 25) +#define ATTACHEDDEVICEPAGELENGTH(x) (((x) & 3) << 23) +#define WAITREADMONITORING (1 << 22) +#define WAITWRITEMONITORING (1 << 21) +#define WAITMONITORINGTIME(x) (((x) & 3) << 18) +#define WAITPINSELECT(x) (((x) & 3) << 16) +#define DEVICESIZE(x) (((x) & 3) << 12) +#define DEVICESIZE_8BIT DEVICESIZE(0) +#define DEVICESIZE_16BIT DEVICESIZE(1) +#define DEVICETYPE(x) (((x) & 3) << 10) +#define DEVICETYPE_NOR DEVICETYPE(0) +#define DEVICETYPE_NAND DEVICETYPE(2) +#define MUXADDDATA (1 << 9) +#define TIMEPARAGRANULARITY (1 << 4) +#define GPMCFCLKDIVIDER(x) (((x) & 3) << 0) + +/* Values for GPMC_CONFIG2 - CS timing */ +#define CSWROFFTIME(x) (((x) & 0x1f) << 16) +#define CSRDOFFTIME(x) (((x) & 0x1f) << 8) +#define CSEXTRADELAY (1 << 7) +#define CSONTIME(x) (((x) & 0xf) << 0) + +/* Values for GPMC_CONFIG3 - nADV timing */ +#define ADVWROFFTIME(x) (((x) & 0x1f) << 16) +#define ADVRDOFFTIME(x) (((x) & 0x1f) << 8) +#define ADVEXTRADELAY (1 << 7) +#define ADVONTIME(x) (((x) & 0xf) << 0) + +/* Values for GPMC_CONFIG4 - nWE and nOE timing */ +#define WEOFFTIME(x) (((x) & 0x1f) << 24) +#define WEEXTRADELAY (1 << 23) +#define WEONTIME(x) (((x) & 0xf) << 16) +#define OEOFFTIME(x) (((x) & 0x1f) << 8) +#define OEEXTRADELAY (1 << 7) +#define OEONTIME(x) (((x) & 0xf) << 0) + +/* Values for GPMC_CONFIG5 - RdAccessTime and CycleTime timing */ +#define PAGEBURSTACCESSTIME(x) (((x) & 0xf) << 24) +#define RDACCESSTIME(x) (((x) & 0x1f) << 16) +#define WRCYCLETIME(x) (((x) & 0x1f) << 8) +#define RDCYCLETIME(x) (((x) & 0x1f) << 0) + +/* Values for GPMC_CONFIG6 - misc timings */ +#define WRACCESSTIME(x) (((x) & 0x1f) << 24) +#define WRDATAONADMUXBUS(x) (((x) & 0xf) << 16) +#define CYCLE2CYCLEDELAY(x) (((x) & 0xf) << 8) +#define CYCLE2CYCLESAMECSEN (1 << 7) +#define CYCLE2CYCLEDIFFCSEN (1 << 6) +#define BUSTURNAROUND(x) (((x) & 0xf) << 0) + +/* Values for GPMC_CONFIG7 - CS address mapping configuration */ +#define MASKADDRESS(x) (((x) & 0xf) << 8) +#define CSVALID (1 << 6) +#define BASEADDRESS(x) (((x) & 0x3f) << 0) + +#endif /* _OMAP3_REGS_H */ diff --git a/arch/arm/include/asm/arch-omap3/omap3.h b/arch/arm/include/asm/arch-omap3/omap3.h index 3957c796f2..cc2b5415c1 100644 --- a/arch/arm/include/asm/arch-omap3/omap3.h +++ b/arch/arm/include/asm/arch-omap3/omap3.h @@ -50,6 +50,20 @@ /* CONTROL */ #define OMAP34XX_CTRL_BASE (OMAP34XX_L4_IO_BASE + 0x2000) +#ifndef __ASSEMBLY__ +/* Signal Integrity Parameter Control Registers */ +struct control_prog_io { + unsigned char res[0x408]; + unsigned int io2; /* 0x408 */ + unsigned char res2[0x38]; + unsigned int io0; /* 0x444 */ + unsigned int io1; /* 0x448 */ +}; +#endif /* __ASSEMBLY__ */ + +/* Bit definition for CONTROL_PROG_IO1 */ +#define PRG_I2C2_PULLUPRESX 0x00000001 + /* UART */ #define OMAP34XX_UART1 (OMAP34XX_L4_IO_BASE + 0x6a000) #define OMAP34XX_UART2 (OMAP34XX_L4_IO_BASE + 0x6c000) |