diff options
Diffstat (limited to 'arch/arm/include/asm/arch-u8500')
-rw-r--r-- | arch/arm/include/asm/arch-u8500/hardware.h | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-u8500/prcmu.h | 10 |
2 files changed, 8 insertions, 4 deletions
diff --git a/arch/arm/include/asm/arch-u8500/hardware.h b/arch/arm/include/asm/arch-u8500/hardware.h index 6bb95ec070..920888052b 100644 --- a/arch/arm/include/asm/arch-u8500/hardware.h +++ b/arch/arm/include/asm/arch-u8500/hardware.h @@ -62,7 +62,7 @@ /* Per4 */ #define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000) -#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x0f000) +#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x06800) /* Per3 */ #define U8500_UART2_BASE (U8500_PER3_BASE + 0x7000) diff --git a/arch/arm/include/asm/arch-u8500/prcmu.h b/arch/arm/include/asm/arch-u8500/prcmu.h index 1fd4d2a564..9862eb3dd9 100644 --- a/arch/arm/include/asm/arch-u8500/prcmu.h +++ b/arch/arm/include/asm/arch-u8500/prcmu.h @@ -28,6 +28,7 @@ #define I2CWRITE 0 #define PRCMU_BASE U8500_PRCMU_BASE +#define PRCMU_BASE_TCDM U8500_PRCMU_TCDM_BASE #define PRCM_UARTCLK_MGT_REG (PRCMU_BASE + 0x018) #define PRCM_MSPCLK_MGT_REG (PRCMU_BASE + 0x01C) #define PRCM_I2CCLK_MGT_REG (PRCMU_BASE + 0x020) @@ -38,12 +39,15 @@ #define PRCM_PER5CLK_MGT_REG (PRCMU_BASE + 0x038) #define PRCM_PER6CLK_MGT_REG (PRCMU_BASE + 0x03C) #define PRCM_PER7CLK_MGT_REG (PRCMU_BASE + 0x040) +#define PRCM_MBOX_CPU_VAL (PRCMU_BASE + 0x0FC) +#define PRCM_MBOX_CPU_SET (PRCMU_BASE + 0x100) #define PRCM_ARM_IT1_CLEAR (PRCMU_BASE + 0x48C) +#define PRCM_ARM_IT1_VAL (PRCMU_BASE + 0x494) #define PRCM_TCR (PRCMU_BASE + 0x1C8) -#define PRCM_REQ_MB5 (PRCMU_BASE + 0xE44) -#define PRCM_ACK_MB5 (PRCMU_BASE + 0xDF4) -#define PRCM_XP70_CUR_PWR_STATE (PRCMU_BASE + 0xFFC) +#define PRCM_REQ_MB5 (PRCMU_BASE_TCDM + 0xE44) +#define PRCM_ACK_MB5 (PRCMU_BASE_TCDM + 0xDF4) +#define PRCM_XP70_CUR_PWR_STATE (PRCMU_BASE_TCDM + 0xFFC) /* Mailbox 5 Requests */ #define PRCM_REQ_MB5_I2COPTYPE_REG (PRCM_REQ_MB5 + 0x0) #define PRCM_REQ_MB5_BIT_FIELDS (PRCM_REQ_MB5 + 0x1) |