diff options
Diffstat (limited to 'arch/arm/include/asm')
| -rw-r--r-- | arch/arm/include/asm/arch-mx7/mx7-ddr.h | 16 | ||||
| -rw-r--r-- | arch/arm/include/asm/mach-imx/boot_mode.h | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/mach-imx/sys_proto.h | 8 |
3 files changed, 22 insertions, 4 deletions
diff --git a/arch/arm/include/asm/arch-mx7/mx7-ddr.h b/arch/arm/include/asm/arch-mx7/mx7-ddr.h index bea5dd8ec5..8ac721114c 100644 --- a/arch/arm/include/asm/arch-mx7/mx7-ddr.h +++ b/arch/arm/include/asm/arch-mx7/mx7-ddr.h @@ -136,11 +136,21 @@ struct ddr_phy { u32 offset_wr_con0; /* 0x0030 */ u32 reserved5[0x07]; u32 cmd_sdll_con0; /* 0x0050 */ - u32 reserved6[0x12]; + u32 reserved6[0x06]; + u32 cmd_lvl_con0; /* 0x006c */ + u32 reserved7[0x02]; + u32 cmd_lvl_con3; /* 0x0078 */ + u32 cmd_deskew_con0; /* 0x007c */ + u32 cmd_deskew_con1; /* 0x0080 */ + u32 cmd_deskew_con2; /* 0x0084 */ + u32 cmd_deskew_con3; /* 0x0088 */ + u32 reserved8[0x02]; + u32 cmd_deskew_con4; /* 0x0094 */ + u32 reserved9; u32 drvds_con0; /* 0x009c */ - u32 reserved7[0x04]; + u32 reserved10[0x04]; u32 mdll_con0; /* 0x00b0 */ - u32 reserved8[0x03]; + u32 reserved11[0x03]; u32 zq_con0; /* 0x00c0 */ }; diff --git a/arch/arm/include/asm/mach-imx/boot_mode.h b/arch/arm/include/asm/mach-imx/boot_mode.h index 3a483b6afa..6dc5855968 100644 --- a/arch/arm/include/asm/mach-imx/boot_mode.h +++ b/arch/arm/include/asm/mach-imx/boot_mode.h @@ -7,6 +7,8 @@ #define _ASM_BOOT_MODE_H #define MAKE_CFGVAL(cfg1, cfg2, cfg3, cfg4) \ ((cfg4) << 24) | ((cfg3) << 16) | ((cfg2) << 8) | (cfg1) +#define MAKE_CFGVAL_PRIMARY_BOOT 0xfffffff0 +#define MAKE_CFGVAL_SECONDARY_BOOT 0xffffffff enum boot_device { WEIM_NOR_BOOT, diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index ab94024c9b..15d1cba8e7 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -78,7 +78,8 @@ struct bd_info; #define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP)) #ifdef CONFIG_MX6 -#define IMX6_SRC_GPR10_BMODE BIT(28) +#define IMX6_SRC_GPR10_BMODE BIT(28) +#define IMX6_SRC_GPR10_PERSIST_SECONDARY_BOOT BIT(30) #define IMX6_BMODE_MASK GENMASK(7, 0) #define IMX6_BMODE_SHIFT 4 @@ -126,6 +127,11 @@ void gpr_init(void); #endif /* CONFIG_MX6 */ +#ifdef CONFIG_MX7 +#define IMX7_SRC_GPR10_BMODE BIT(28) +#define IMX7_SRC_GPR10_PERSIST_SECONDARY_BOOT BIT(30) +#endif + /* address translation table */ struct rproc_att { u32 da; /* device address (From Cortex M4 view) */ |