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-rw-r--r--arch/arm/mach-imx/Makefile15
-rw-r--r--arch/arm/mach-imx/cache.c18
-rw-r--r--arch/arm/mach-imx/hab.c6
-rw-r--r--arch/arm/mach-imx/imx8/Kconfig8
-rw-r--r--arch/arm/mach-imx/imx8/cpu.c39
-rw-r--r--arch/arm/mach-imx/misc.c32
-rwxr-xr-xarch/arm/mach-imx/mkimage_fit_atf.sh3
-rw-r--r--arch/arm/mach-imx/mx6/Kconfig13
-rw-r--r--arch/arm/mach-imx/mx7/soc.c2
-rw-r--r--arch/arm/mach-imx/spl.c14
10 files changed, 119 insertions, 31 deletions
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index d236e40510..9c7ce9e99d 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -24,7 +24,7 @@ obj-y += cpu.o speed.o
obj-$(CONFIG_GPT_TIMER) += timer.o
obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
endif
-ifeq ($(SOC),$(filter $(SOC),mx7 mx6 mxs imx8m))
+ifeq ($(SOC),$(filter $(SOC),mx7 mx6 mxs imx8m imx8))
obj-y += misc.o
obj-$(CONFIG_SPL_BUILD) += spl.o
endif
@@ -106,6 +106,7 @@ IMX_CONFIG = $(CONFIG_IMX_CONFIG:"%"=%)
ifeq ($(CONFIG_ARCH_IMX8), y)
CNTR_DEPFILES := $(srctree)/tools/imx_cntr_image.sh
IMAGE_TYPE := imx8image
+SPL_DEPFILE_EXISTS := $(shell $(CPP) $(cpp_flags) -x c -o spl/u-boot-spl.cfgout $(srctree)/$(IMX_CONFIG); if [ -f spl/u-boot-spl.cfgout ]; then $(CNTR_DEPFILES) spl/u-boot-spl.cfgout; echo $$?; fi)
DEPFILE_EXISTS := $(shell $(CPP) $(cpp_flags) -x c -o u-boot-dtb.cfgout $(srctree)/$(IMX_CONFIG); if [ -f u-boot-dtb.cfgout ]; then $(CNTR_DEPFILES) u-boot-dtb.cfgout; echo $$?; fi)
else ifeq ($(CONFIG_ARCH_IMX8M), y)
IMAGE_TYPE := imx8mimage
@@ -154,6 +155,18 @@ ifeq ($(DEPFILE_EXISTS),0)
endif
endif
+ifeq ($(CONFIG_ARCH_IMX8), y)
+SPL:
+
+MKIMAGEFLAGS_flash.bin = -n spl/u-boot-spl.cfgout -T $(IMAGE_TYPE) -e 0x100000
+flash.bin: MKIMAGEOUTPUT = flash.log
+
+flash.bin: spl/u-boot-spl.bin u-boot.itb FORCE
+ifeq ($(SPL_DEPFILE_EXISTS),0)
+ $(call if_changed,mkimage)
+endif
+endif
+
else
MKIMAGEFLAGS_SPL = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) \
-T $(IMAGE_TYPE) -e $(CONFIG_SPL_TEXT_BASE)
diff --git a/arch/arm/mach-imx/cache.c b/arch/arm/mach-imx/cache.c
index 82257f3280..75e1f54c6a 100644
--- a/arch/arm/mach-imx/cache.c
+++ b/arch/arm/mach-imx/cache.c
@@ -82,7 +82,7 @@ void v7_outer_cache_enable(void)
{
struct pl310_regs *const pl310 = (struct pl310_regs *)L2_PL310_BASE;
struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
- unsigned int val;
+ unsigned int val, cache_id;
/*
@@ -112,22 +112,24 @@ void v7_outer_cache_enable(void)
val = readl(&pl310->pl310_prefetch_ctrl);
- /* Turn on the L2 I/D prefetch */
- val |= 0x30000000;
+ /* Turn on the L2 I/D prefetch, double linefill */
+ /* Set prefetch offset with any value except 23 as per errata 765569 */
+ val |= 0x7000000f;
/*
* The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0
- * The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2
+ * The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL/SX/DQP
+ * is r3p2.
* But according to ARM PL310 errata: 752271
* ID: 752271: Double linefill feature can cause data corruption
* Fault Status: Present in: r3p0, r3p1, r3p1-50rel0. Fixed in r3p2
* Workaround: The only workaround to this erratum is to disable the
* double linefill feature. This is the default behavior.
*/
-
-#ifndef CONFIG_MX6Q
- val |= 0x40800000;
-#endif
+ cache_id = readl(&pl310->pl310_cache_id);
+ if (((cache_id & L2X0_CACHE_ID_PART_MASK) == L2X0_CACHE_ID_PART_L310)
+ && ((cache_id & L2X0_CACHE_ID_RTL_MASK) < L2X0_CACHE_ID_RTL_R3P2))
+ val &= ~(1 << 30);
writel(val, &pl310->pl310_prefetch_ctrl);
val = readl(&pl310->pl310_power_ctrl);
diff --git a/arch/arm/mach-imx/hab.c b/arch/arm/mach-imx/hab.c
index dbfd692fa3..d42a15e877 100644
--- a/arch/arm/mach-imx/hab.c
+++ b/arch/arm/mach-imx/hab.c
@@ -585,8 +585,10 @@ int imx_hab_authenticate_image(uint32_t ddr_start, uint32_t image_size,
}
/* Verify if IVT DCD pointer is NULL */
- if (ivt->dcd)
- puts("Warning: DCD pointer should be NULL\n");
+ if (ivt->dcd) {
+ puts("Error: DCD pointer must be NULL\n");
+ goto hab_authentication_exit;
+ }
start = ddr_start;
bytes = image_size;
diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig
index 0d3a87cd74..f76a139684 100644
--- a/arch/arm/mach-imx/imx8/Kconfig
+++ b/arch/arm/mach-imx/imx8/Kconfig
@@ -3,8 +3,16 @@ if ARCH_IMX8
config IMX8
bool
+config MU_BASE_SPL
+ hex "MU base address used in SPL"
+ default 0x5d1b0000
+ help
+ SPL runs in EL3 mode, it use MU0_A to communicate with SCU.
+ So we could not reuse the one in dts which is for normal U-Boot.
+
config IMX8QXP
select IMX8
+ select SUPPORT_SPL
bool
config SYS_SOC
diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c
index 7599afe720..7539e45652 100644
--- a/arch/arm/mach-imx/imx8/cpu.c
+++ b/arch/arm/mach-imx/imx8/cpu.c
@@ -35,15 +35,20 @@ struct pass_over_info_t *get_pass_over_info(void)
int arch_cpu_init(void)
{
- struct pass_over_info_t *pass_over = get_pass_over_info();
-
- if (pass_over && pass_over->g_ap_mu == 0) {
- /*
- * When ap_mu is 0, means the U-Boot booted
- * from first container
- */
- sc_misc_boot_status(-1, SC_MISC_BOOT_STATUS_SUCCESS);
+#ifdef CONFIG_SPL_BUILD
+ struct pass_over_info_t *pass_over;
+
+ if (is_soc_rev(CHIP_REV_A)) {
+ pass_over = get_pass_over_info();
+ if (pass_over && pass_over->g_ap_mu == 0) {
+ /*
+ * When ap_mu is 0, means the U-Boot booted
+ * from first container
+ */
+ sc_misc_boot_status(-1, SC_MISC_BOOT_STATUS_SUCCESS);
+ }
}
+#endif
return 0;
}
@@ -507,15 +512,6 @@ err:
printf("%s: fuse %d, err: %d\n", __func__, word[i], ret);
}
-#if CONFIG_IS_ENABLED(CPU)
-struct cpu_imx_platdata {
- const char *name;
- const char *rev;
- const char *type;
- u32 cpurev;
- u32 freq_mhz;
-};
-
u32 get_cpu_rev(void)
{
u32 id = 0, rev = 0;
@@ -531,6 +527,15 @@ u32 get_cpu_rev(void)
return (id << 12) | rev;
}
+#if CONFIG_IS_ENABLED(CPU)
+struct cpu_imx_platdata {
+ const char *name;
+ const char *rev;
+ const char *type;
+ u32 cpurev;
+ u32 freq_mhz;
+};
+
const char *get_imx8_type(u32 imxtype)
{
switch (imxtype) {
diff --git a/arch/arm/mach-imx/misc.c b/arch/arm/mach-imx/misc.c
index 1bb8c508de..31e95a9a28 100644
--- a/arch/arm/mach-imx/misc.c
+++ b/arch/arm/mach-imx/misc.c
@@ -9,6 +9,8 @@
#include <asm/io.h>
#include <asm/mach-imx/regs-common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* 1 second delay should be plenty of time for block reset. */
#define RESET_MAX_TIMEOUT 1000000
@@ -71,3 +73,33 @@ int mxs_reset_block(struct mxs_register_32 *reg)
return 0;
}
+
+static ulong get_sp(void)
+{
+ ulong ret;
+
+ asm("mov %0, sp" : "=r"(ret) : );
+ return ret;
+}
+
+void board_lmb_reserve(struct lmb *lmb)
+{
+ ulong sp, bank_end;
+ int bank;
+
+ sp = get_sp();
+ debug("## Current stack ends at 0x%08lx ", sp);
+
+ /* adjust sp by 16K to be safe */
+ sp -= 4096 << 2;
+ for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
+ if (sp < gd->bd->bi_dram[bank].start)
+ continue;
+ bank_end = gd->bd->bi_dram[bank].start +
+ gd->bd->bi_dram[bank].size;
+ if (sp >= bank_end)
+ continue;
+ lmb_reserve(lmb, sp, bank_end - sp);
+ break;
+ }
+}
diff --git a/arch/arm/mach-imx/mkimage_fit_atf.sh b/arch/arm/mach-imx/mkimage_fit_atf.sh
index 77f7143263..38c9858e84 100755
--- a/arch/arm/mach-imx/mkimage_fit_atf.sh
+++ b/arch/arm/mach-imx/mkimage_fit_atf.sh
@@ -9,6 +9,7 @@
[ -z "$BL31" ] && BL31="bl31.bin"
[ -z "$TEE_LOAD_ADDR" ] && TEE_LOAD_ADDR="0xfe000000"
[ -z "$ATF_LOAD_ADDR" ] && ATF_LOAD_ADDR="0x00910000"
+[ -z "$BL33_LOAD_ADDR" ] && BL33_LOAD_ADDR="0x40200000"
if [ ! -f $BL31 ]; then
echo "ERROR: BL31 file $BL31 NOT found" >&2
@@ -58,7 +59,7 @@ cat << __HEADER_EOF
type = "standalone";
arch = "arm64";
compression = "none";
- load = <0x40200000>;
+ load = <$BL33_LOAD_ADDR>;
};
atf@1 {
description = "ARM Trusted Firmware";
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index 3d56346ccb..d0cee514a2 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -429,6 +429,18 @@ config TARGET_PFLA02
select MX6QDL
select SUPPORT_SPL
+config TARGET_PCL063
+ bool "PHYTEC PCL063 (phyCORE-i.MX6UL)"
+ select MX6UL
+ select DM
+ select DM_ETH
+ select DM_GPIO
+ select DM_I2C
+ select DM_MMC
+ select DM_SERIAL
+ select DM_THERMAL
+ select SUPPORT_SPL
+
config TARGET_SECOMX6
bool "secomx6 boards"
@@ -551,6 +563,7 @@ source "board/freescale/mx6ullevk/Kconfig"
source "board/grinn/liteboard/Kconfig"
source "board/phytec/pcm058/Kconfig"
source "board/phytec/pfla02/Kconfig"
+source "board/phytec/pcl063/Kconfig"
source "board/gateworks/gw_ventana/Kconfig"
source "board/kosagi/novena/Kconfig"
source "board/samtec/vining_2000/Kconfig"
diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
index 3f74f8a3ed..7cfdff0981 100644
--- a/arch/arm/mach-imx/mx7/soc.c
+++ b/arch/arm/mach-imx/mx7/soc.c
@@ -368,8 +368,10 @@ void s_init(void)
void reset_misc(void)
{
+#ifndef CONFIG_SPL_BUILD
#ifdef CONFIG_VIDEO_MXS
lcdif_power_down();
#endif
+#endif
}
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index 397d6d4a91..ebd8ff9290 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -96,7 +96,7 @@ u32 spl_boot_device(void)
return BOOT_DEVICE_NONE;
}
-#elif defined(CONFIG_MX7) || defined(CONFIG_IMX8M)
+#elif defined(CONFIG_MX7) || defined(CONFIG_IMX8M) || defined(CONFIG_IMX8)
/* Translate iMX7/i.MX8M boot device to the SPL boot device enumeration */
u32 spl_boot_device(void)
{
@@ -134,6 +134,15 @@ u32 spl_boot_device(void)
case SD3_BOOT:
case MMC3_BOOT:
return BOOT_DEVICE_MMC1;
+#elif defined(CONFIG_IMX8)
+ case MMC1_BOOT:
+ return BOOT_DEVICE_MMC1;
+ case SD2_BOOT:
+ return BOOT_DEVICE_MMC2_2;
+ case SD3_BOOT:
+ return BOOT_DEVICE_MMC1;
+ case FLEXSPI_BOOT:
+ return BOOT_DEVICE_SPI;
#elif defined(CONFIG_IMX8M)
case SD1_BOOT:
case MMC1_BOOT:
@@ -152,7 +161,7 @@ u32 spl_boot_device(void)
return BOOT_DEVICE_NONE;
}
}
-#endif /* CONFIG_MX7 || CONFIG_IMX8M */
+#endif /* CONFIG_MX7 || CONFIG_IMX8M || CONFIG_IMX8 */
#ifdef CONFIG_SPL_USB_GADGET
int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
@@ -171,6 +180,7 @@ u32 spl_boot_mode(const u32 boot_device)
/* for MMC return either RAW or FAT mode */
case BOOT_DEVICE_MMC1:
case BOOT_DEVICE_MMC2:
+ case BOOT_DEVICE_MMC2_2:
#if defined(CONFIG_SPL_FAT_SUPPORT)
return MMCSD_MODE_FS;
#elif defined(CONFIG_SUPPORT_EMMC_BOOT)
generated by cgit (git 2.34.1) at 2024-12-24 05:13:53 +0000