diff options
Diffstat (limited to 'arch/arm/mach-keystone/init.c')
| -rw-r--r-- | arch/arm/mach-keystone/init.c | 32 |
1 files changed, 31 insertions, 1 deletions
diff --git a/arch/arm/mach-keystone/init.c b/arch/arm/mach-keystone/init.c index 2368315ff6..3b6d5efce1 100644 --- a/arch/arm/mach-keystone/init.c +++ b/arch/arm/mach-keystone/init.c @@ -98,29 +98,57 @@ static void config_pcie_mode(int pcie_port, enum pci_mode mode) static void msmc_k2hkle_common_setup(void) { + msmc_share_all_segments(KS2_MSMC_SEGMENT_C6X_0); msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_ARM); msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_NETCP); #ifdef KS2_MSMC_SEGMENT_QM_PDSP msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_QM_PDSP); #endif msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_PCIE0); + msmc_share_all_segments(KS2_MSMC_SEGMENT_DEBUG); +} + +static void msmc_k2hk_setup(void) +{ + msmc_share_all_segments(KS2_MSMC_SEGMENT_C6X_1); + msmc_share_all_segments(KS2_MSMC_SEGMENT_C6X_2); + msmc_share_all_segments(KS2_MSMC_SEGMENT_C6X_3); + msmc_share_all_segments(KS2_MSMC_SEGMENT_C6X_4); + msmc_share_all_segments(KS2_MSMC_SEGMENT_C6X_5); + msmc_share_all_segments(KS2_MSMC_SEGMENT_C6X_6); + msmc_share_all_segments(KS2_MSMC_SEGMENT_C6X_7); + msmc_share_all_segments(K2HKE_MSMC_SEGMENT_HYPERLINK); } static inline void msmc_k2l_setup(void) { + msmc_share_all_segments(KS2_MSMC_SEGMENT_C6X_1); + msmc_share_all_segments(KS2_MSMC_SEGMENT_C6X_2); + msmc_share_all_segments(KS2_MSMC_SEGMENT_C6X_3); msmc_share_all_segments(K2L_MSMC_SEGMENT_PCIE1); } static inline void msmc_k2e_setup(void) { msmc_share_all_segments(K2E_MSMC_SEGMENT_PCIE1); + msmc_share_all_segments(K2HKE_MSMC_SEGMENT_HYPERLINK); + msmc_share_all_segments(K2E_MSMC_SEGMENT_TSIP); } -static inline void msmc_k2g_setup(void) +static void msmc_k2g_setup(void) { + msmc_share_all_segments(KS2_MSMC_SEGMENT_C6X_0); msmc_share_all_segments(K2G_MSMC_SEGMENT_ARM); + msmc_share_all_segments(K2G_MSMC_SEGMENT_ICSS0); + msmc_share_all_segments(K2G_MSMC_SEGMENT_ICSS1); msmc_share_all_segments(K2G_MSMC_SEGMENT_NSS); msmc_share_all_segments(K2G_MSMC_SEGMENT_PCIE); + msmc_share_all_segments(K2G_MSMC_SEGMENT_USB); + msmc_share_all_segments(K2G_MSMC_SEGMENT_MLB); + msmc_share_all_segments(K2G_MSMC_SEGMENT_PMMC); + msmc_share_all_segments(K2G_MSMC_SEGMENT_DSS); + msmc_share_all_segments(K2G_MSMC_SEGMENT_MMC); + msmc_share_all_segments(KS2_MSMC_SEGMENT_DEBUG); } int arch_cpu_init(void) @@ -136,6 +164,8 @@ int arch_cpu_init(void) msmc_k2e_setup(); else if (cpu_is_k2l()) msmc_k2l_setup(); + else + msmc_k2hk_setup(); } /* Initialize the PCIe-0 to work as Root Complex */ |