summaryrefslogtreecommitdiff
path: root/arch/arm/mach-socfpga/misc_s10.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-socfpga/misc_s10.c')
-rw-r--r--arch/arm/mach-socfpga/misc_s10.c18
1 files changed, 10 insertions, 8 deletions
diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c
index 670bfa1a31..52868fb344 100644
--- a/arch/arm/mach-socfpga/misc_s10.c
+++ b/arch/arm/mach-socfpga/misc_s10.c
@@ -151,17 +151,19 @@ int arch_early_init_r(void)
return 0;
}
+/* Return 1 if FPGA is ready otherwise return 0 */
+int is_fpga_config_ready(void)
+{
+ return (readl(socfpga_get_sysmgr_addr() + SYSMGR_SOC64_FPGA_CONFIG) &
+ SYSMGR_FPGACONFIG_READY_MASK) == SYSMGR_FPGACONFIG_READY_MASK;
+}
+
void do_bridge_reset(int enable, unsigned int mask)
{
/* Check FPGA status before bridge enable */
- if (enable) {
- int ret = mbox_get_fpga_config_status(MBOX_RECONFIG_STATUS);
-
- if (ret && ret != MBOX_CFGSTAT_STATE_CONFIG)
- ret = mbox_get_fpga_config_status(MBOX_CONFIG_STATUS);
-
- if (ret)
- return;
+ if (!is_fpga_config_ready()) {
+ puts("FPGA not ready. Bridge reset aborted!\n");
+ return;
}
socfpga_bridges_reset(enable);