summaryrefslogtreecommitdiff
path: root/arch/arm/mach-stm32mp/include/mach
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-stm32mp/include/mach')
-rw-r--r--arch/arm/mach-stm32mp/include/mach/ddr.h6
-rw-r--r--arch/arm/mach-stm32mp/include/mach/stm32.h9
-rw-r--r--arch/arm/mach-stm32mp/include/mach/stm32mp1_smc.h5
-rw-r--r--arch/arm/mach-stm32mp/include/mach/sys_proto.h12
4 files changed, 26 insertions, 6 deletions
diff --git a/arch/arm/mach-stm32mp/include/mach/ddr.h b/arch/arm/mach-stm32mp/include/mach/ddr.h
index b8a17cfbdd..bfc42a7c48 100644
--- a/arch/arm/mach-stm32mp/include/mach/ddr.h
+++ b/arch/arm/mach-stm32mp/include/mach/ddr.h
@@ -9,8 +9,10 @@
/* DDR power initializations */
enum ddr_type {
STM32MP_DDR3,
- STM32MP_LPDDR2,
- STM32MP_LPDDR3,
+ STM32MP_LPDDR2_16,
+ STM32MP_LPDDR2_32,
+ STM32MP_LPDDR3_16,
+ STM32MP_LPDDR3_32,
};
int board_ddr_power_init(enum ddr_type ddr_type);
diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h
index f0636005e5..6daf9f7121 100644
--- a/arch/arm/mach-stm32mp/include/mach/stm32.h
+++ b/arch/arm/mach-stm32mp/include/mach/stm32.h
@@ -119,7 +119,14 @@ enum forced_boot_mode {
#define STM32_BSEC_SHADOW(id) (STM32_BSEC_SHADOW_OFFSET + (id) * 4)
#define STM32_BSEC_OTP_OFFSET 0x80000000
#define STM32_BSEC_OTP(id) (STM32_BSEC_OTP_OFFSET + (id) * 4)
-
+#define STM32_BSEC_LOCK_OFFSET 0xC0000000
+#define STM32_BSEC_LOCK(id) (STM32_BSEC_LOCK_OFFSET + (id) * 4)
+
+/* BSEC OTP index */
+#define BSEC_OTP_RPN 1
+#define BSEC_OTP_SERIAL 13
+#define BSEC_OTP_PKG 16
+#define BSEC_OTP_MAC 57
#define BSEC_OTP_BOARD 59
#endif /* __ASSEMBLY__*/
diff --git a/arch/arm/mach-stm32mp/include/mach/stm32mp1_smc.h b/arch/arm/mach-stm32mp/include/mach/stm32mp1_smc.h
index 8130546b27..4ad14f963b 100644
--- a/arch/arm/mach-stm32mp/include/mach/stm32mp1_smc.h
+++ b/arch/arm/mach-stm32mp/include/mach/stm32mp1_smc.h
@@ -27,6 +27,7 @@
#define STM32_SMC_READ_OTP 0x04
#define STM32_SMC_READ_ALL 0x05
#define STM32_SMC_WRITE_ALL 0x06
+#define STM32_SMC_WRLOCK_OTP 0x07
/* SMC error codes */
#define STM32_SMC_OK 0x0
@@ -45,8 +46,8 @@ static inline u32 stm32_smc(u32 svc, u8 op, u32 data1, u32 data2, u32 *result)
arm_smccc_smc(svc, op, data1, data2, 0, 0, 0, 0, &res);
if (res.a0) {
- pr_err("%s: Failed to exec in secure mode (err = %ld)\n",
- __func__, res.a0);
+ pr_err("%s: Failed to exec svc=%x op=%x in secure mode (err = %ld)\n",
+ __func__, svc, op, res.a0);
return -EINVAL;
}
if (result)
diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
index da46c11573..1617126bea 100644
--- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
+++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
@@ -3,13 +3,19 @@
* Copyright (C) 2015-2017, STMicroelectronics - All Rights Reserved
*/
-/* ID = Device Version (bit31:16) + Device Part Number (RPN) (bit15:0)*/
+/* ID = Device Version (bit31:16) + Device Part Number (RPN) (bit7:0) */
#define CPU_STM32MP157Cxx 0x05000000
#define CPU_STM32MP157Axx 0x05000001
#define CPU_STM32MP153Cxx 0x05000024
#define CPU_STM32MP153Axx 0x05000025
#define CPU_STM32MP151Cxx 0x0500002E
#define CPU_STM32MP151Axx 0x0500002F
+#define CPU_STM32MP157Fxx 0x05000080
+#define CPU_STM32MP157Dxx 0x05000081
+#define CPU_STM32MP153Fxx 0x050000A4
+#define CPU_STM32MP153Dxx 0x050000A5
+#define CPU_STM32MP151Fxx 0x050000AE
+#define CPU_STM32MP151Dxx 0x050000AF
/* return CPU_STMP32MP...Xxx constants */
u32 get_cpu_type(void);
@@ -29,6 +35,10 @@ u32 get_cpu_package(void);
#define PKG_AC_TFBGA361 2
#define PKG_AD_TFBGA257 1
+/* Get SOC name */
+#define SOC_NAME_SIZE 20
+void get_soc_name(char name[SOC_NAME_SIZE]);
+
/* return boot mode */
u32 get_bootmode(void);