diff options
Diffstat (limited to 'arch/arm/mach-versal')
-rw-r--r-- | arch/arm/mach-versal/Kconfig | 12 | ||||
-rw-r--r-- | arch/arm/mach-versal/cpu.c | 84 | ||||
-rw-r--r-- | arch/arm/mach-versal/include/mach/hardware.h | 23 | ||||
-rw-r--r-- | arch/arm/mach-versal/include/mach/sys_proto.h | 61 |
4 files changed, 151 insertions, 29 deletions
diff --git a/arch/arm/mach-versal/Kconfig b/arch/arm/mach-versal/Kconfig index 26d1756371..a08e5ae414 100644 --- a/arch/arm/mach-versal/Kconfig +++ b/arch/arm/mach-versal/Kconfig @@ -36,11 +36,6 @@ config COUNTER_FREQUENCY config ZYNQ_SDHCI_MAX_FREQ default 200000000 -config VERSAL_OF_BOARD_DTB_ADDR - hex - default 0x1000 - depends on OF_BOARD - config IOU_SWITCH_DIVISOR0 hex "IOU switch divisor0" default 0x20 @@ -54,4 +49,11 @@ config SYS_MEM_RSVD_FOR_MMU MMU table than the one which will be allocated during relocation. +config DEFINE_TCM_OCM_MMAP + bool "Define TCM and OCM memory in MMU Table" + default y if MP + help + This option if enabled defines the TCM and OCM memory and its + memory attributes in MMU table entry. + endif diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c index 70c1908ec4..49f1e51c8e 100644 --- a/arch/arm/mach-versal/cpu.c +++ b/arch/arm/mach-versal/cpu.c @@ -12,14 +12,21 @@ DECLARE_GLOBAL_DATA_PTR; -static struct mm_region versal_mem_map[] = { +#define VERSAL_MEM_MAP_USED 5 + +#define DRAM_BANKS CONFIG_NR_DRAM_BANKS + +#if defined(CONFIG_DEFINE_TCM_OCM_MMAP) +#define TCM_MAP 1 +#else +#define TCM_MAP 0 +#endif + +/* +1 is end of list which needs to be empty */ +#define VERSAL_MEM_MAP_MAX (VERSAL_MEM_MAP_USED + DRAM_BANKS + TCM_MAP + 1) + +static struct mm_region versal_mem_map[VERSAL_MEM_MAP_MAX] = { { - .virt = 0x0UL, - .phys = 0x0UL, - .size = 0x80000000UL, - .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | - PTE_BLOCK_INNER_SHARE - }, { .virt = 0x80000000UL, .phys = 0x80000000UL, .size = 0x70000000UL, @@ -34,12 +41,6 @@ static struct mm_region versal_mem_map[] = { PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN }, { - .virt = 0xffe00000UL, - .phys = 0xffe00000UL, - .size = 0x00200000UL, - .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | - PTE_BLOCK_INNER_SHARE - }, { .virt = 0x400000000UL, .phys = 0x400000000UL, .size = 0x200000000UL, @@ -59,12 +60,36 @@ static struct mm_region versal_mem_map[] = { .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN - }, { - /* List terminator */ - 0, } }; +void mem_map_fill(void) +{ + int banks = VERSAL_MEM_MAP_USED; + +#if defined(CONFIG_DEFINE_TCM_OCM_MMAP) + versal_mem_map[banks].virt = 0xffe00000UL; + versal_mem_map[banks].phys = 0xffe00000UL; + versal_mem_map[banks].size = 0x00200000UL; + versal_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE; + banks = banks + 1; +#endif + + for (int i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + /* Zero size means no more DDR that's this is end */ + if (!gd->bd->bi_dram[i].size) + break; + + versal_mem_map[banks].virt = gd->bd->bi_dram[i].start; + versal_mem_map[banks].phys = gd->bd->bi_dram[i].start; + versal_mem_map[banks].size = gd->bd->bi_dram[i].size; + versal_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE; + banks = banks + 1; + } +} + struct mm_region *mem_map = versal_mem_map; u64 get_page_table_size(void) @@ -83,16 +108,27 @@ int reserve_mmu(void) } #endif -#if defined(CONFIG_OF_BOARD) -void *board_fdt_blob_setup(void) +int versal_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2, + u32 arg3, u32 *ret_payload) { - static void *fw_dtb = (void *)CONFIG_VERSAL_OF_BOARD_DTB_ADDR; + struct pt_regs regs; + + if (current_el() == 3) + return 0; - if (fdt_magic(fw_dtb) != FDT_MAGIC) { - printf("DTB is not passed via %llx\n", (u64)fw_dtb); - return NULL; + regs.regs[0] = PM_SIP_SVC | api_id; + regs.regs[1] = ((u64)arg1 << 32) | arg0; + regs.regs[2] = ((u64)arg3 << 32) | arg2; + + smc_call(®s); + + if (ret_payload) { + ret_payload[0] = (u32)regs.regs[0]; + ret_payload[1] = upper_32_bits(regs.regs[0]); + ret_payload[2] = (u32)regs.regs[1]; + ret_payload[3] = upper_32_bits(regs.regs[1]); + ret_payload[4] = (u32)regs.regs[2]; } - return fw_dtb; + return regs.regs[0]; } -#endif diff --git a/arch/arm/mach-versal/include/mach/hardware.h b/arch/arm/mach-versal/include/mach/hardware.h index 23fbc3d8f5..e26beab2e9 100644 --- a/arch/arm/mach-versal/include/mach/hardware.h +++ b/arch/arm/mach-versal/include/mach/hardware.h @@ -51,3 +51,26 @@ struct rpu_regs { }; #define rpu_base ((struct rpu_regs *)VERSAL_RPU_BASEADDR) + +#define VERSAL_CRP_BASEADDR 0xF1260000 + +struct crp_regs { + u32 reserved0[128]; + u32 boot_mode_usr; +}; + +#define crp_base ((struct crp_regs *)VERSAL_CRP_BASEADDR) + +/* Bootmode setting values */ +#define BOOT_MODES_MASK 0x0000000F +#define QSPI_MODE_24BIT 0x00000001 +#define QSPI_MODE_32BIT 0x00000002 +#define SD_MODE 0x00000003 /* sd 0 */ +#define SD_MODE1 0x00000005 /* sd 1 */ +#define EMMC_MODE 0x00000006 +#define USB_MODE 0x00000007 +#define OSPI_MODE 0x00000008 +#define SD1_LSHFT_MODE 0x0000000E /* SD1 Level shifter */ +#define JTAG_MODE 0x00000000 +#define BOOT_MODE_USE_ALT 0x100 +#define BOOT_MODE_ALT_SHIFT 12 diff --git a/arch/arm/mach-versal/include/mach/sys_proto.h b/arch/arm/mach-versal/include/mach/sys_proto.h index 1dc7bf6656..2f5ad02bf4 100644 --- a/arch/arm/mach-versal/include/mach/sys_proto.h +++ b/arch/arm/mach-versal/include/mach/sys_proto.h @@ -8,4 +8,65 @@ enum { TCM_SPLIT, }; +enum pm_api_id { + PM_GET_API_VERSION = 1, + PM_SET_CONFIGURATION, + PM_GET_NODE_STATUS, + PM_GET_OPERATING_CHARACTERISTIC, + PM_REGISTER_NOTIFIER, + PM_REQUEST_SUSPEND, + PM_SELF_SUSPEND, + PM_FORCE_POWERDOWN, + PM_ABORT_SUSPEND, + PM_REQUEST_WAKEUP, + PM_SET_WAKEUP_SOURCE, + PM_SYSTEM_SHUTDOWN, + PM_REQUEST_NODE, + PM_RELEASE_NODE, + PM_SET_REQUIREMENT, + PM_SET_MAX_LATENCY, + PM_RESET_ASSERT, + PM_RESET_GET_STATUS, + PM_MMIO_WRITE, + PM_MMIO_READ, + PM_PM_INIT_FINALIZE, + PM_FPGA_LOAD, + PM_FPGA_GET_STATUS, + PM_GET_CHIPID, + PM_SECURE_SHA = 26, + PM_SECURE_RSA, + PM_PINCTRL_REQUEST, + PM_PINCTRL_RELEASE, + PM_PINCTRL_GET_FUNCTION, + PM_PINCTRL_SET_FUNCTION, + PM_PINCTRL_CONFIG_PARAM_GET, + PM_PINCTRL_CONFIG_PARAM_SET, + PM_IOCTL, + PM_QUERY_DATA, + PM_CLOCK_ENABLE, + PM_CLOCK_DISABLE, + PM_CLOCK_GETSTATE, + PM_CLOCK_SETDIVIDER, + PM_CLOCK_GETDIVIDER, + PM_CLOCK_SETRATE, + PM_CLOCK_GETRATE, + PM_CLOCK_SETPARENT, + PM_CLOCK_GETPARENT, + PM_SECURE_IMAGE, + PM_FPGA_READ = 46, + PM_SECURE_AES, + PM_CLOCK_PLL_GETPARAM = 49, + PM_REGISTER_ACCESS = 52, + PM_EFUSE_ACCESS, + PM_FEATURE_CHECK = 63, + PM_API_MAX, +}; + +#define PM_SIP_SVC 0xC2000000 +#define PAYLOAD_ARG_CNT 4U + void tcm_init(u8 mode); +void mem_map_fill(void); + +int versal_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2, + u32 arg3, u32 *ret_payload); |