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-rw-r--r--arch/arm/dts/zynqmp-mini-qspi.dts4
-rw-r--r--arch/arm/mach-zynqmp/spl.c3
2 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/dts/zynqmp-mini-qspi.dts b/arch/arm/dts/zynqmp-mini-qspi.dts
index c235a5f731..1716d5179d 100644
--- a/arch/arm/dts/zynqmp-mini-qspi.dts
+++ b/arch/arm/dts/zynqmp-mini-qspi.dts
@@ -63,8 +63,8 @@
&qspi {
status = "okay";
- flash@0 {
- compatible = "n25q512a11";
+ flash0: flash@0 {
+ compatible = "n25q512a11", "spi-flash";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c
index f6f5414201..b52ac17853 100644
--- a/arch/arm/mach-zynqmp/spl.c
+++ b/arch/arm/mach-zynqmp/spl.c
@@ -27,6 +27,7 @@ void board_init_f(ulong dummy)
/* Delay is required for clocks to be propagated */
udelay(1000000);
+ debug("Clearing BSS 0x%p - 0x%p\n", __bss_start, __bss_end);
/* Clear the BSS */
memset(__bss_start, 0, __bss_end - __bss_start);
@@ -85,7 +86,7 @@ u32 spl_boot_device(void)
case SD_MODE1:
case SD1_LSHFT_MODE: /* not working on silicon v1 */
/* if both controllers enabled, then these two are the second controller */
-#if defined(SPL_ZYNQMP_TWO_SDHCI)
+#ifdef CONFIG_SPL_ZYNQMP_TWO_SDHCI
return BOOT_DEVICE_MMC2;
/* else, fall through, the one SDHCI controller that is enabled is number 1 */
#endif