4 files changed, 33 insertions, 19 deletions
diff --git a/arch/arm/cpu/armv7/exynos/power.c b/arch/arm/cpu/armv7/exynos/power.c
index 638ee0b30b..e1ab3d6997 100644
--- a/arch/arm/cpu/armv7/exynos/power.c
+++ b/arch/arm/cpu/armv7/exynos/power.c
@@ -202,3 +202,10 @@ void power_exit_wakeup(void)
 	else
 		exynos4_power_exit_wakeup();
 }
+
+unsigned int get_boot_mode(void)
+{
+	unsigned int om_pin = samsung_get_base_power();
+
+	return readl(om_pin) & OM_PIN_MASK;
+}
diff --git a/arch/arm/cpu/armv7/exynos/spl_boot.c b/arch/arm/cpu/armv7/exynos/spl_boot.c
index 79166303d1..658e4cb715 100644
--- a/arch/arm/cpu/armv7/exynos/spl_boot.c
+++ b/arch/arm/cpu/armv7/exynos/spl_boot.c
@@ -20,7 +20,6 @@
 #include "clock_init.h"
 
 DECLARE_GLOBAL_DATA_PTR;
-#define OM_STAT         (0x1f << 1)
 
 /* Index into irom ptr table */
 enum index {
@@ -184,7 +183,7 @@ static void exynos_spi_copy(unsigned int uboot_size, unsigned int uboot_addr)
 */
 void copy_uboot_to_ram(void)
 {
-	enum boot_mode bootmode = BOOT_MODE_OM;
+	unsigned int bootmode = BOOT_MODE_OM;
 
 	u32 (*copy_bl2)(u32 offset, u32 nblock, u32 dst) = NULL;
 	u32 offset = 0, size = 0;
@@ -207,7 +206,7 @@ void copy_uboot_to_ram(void)
 #endif
 
 	if (bootmode == BOOT_MODE_OM)
-		bootmode = readl(samsung_get_base_power()) & OM_STAT;
+		bootmode = get_boot_mode();
 
 	switch (bootmode) {
 #ifdef CONFIG_SPI_BOOTING
@@ -216,7 +215,7 @@ void copy_uboot_to_ram(void)
 		exynos_spi_copy(param->uboot_size, CONFIG_SYS_TEXT_BASE);
 		break;
 #endif
-	case BOOT_MODE_MMC:
+	case BOOT_MODE_SD:
 		offset = BL2_START_OFFSET;
 		size = BL2_SIZE_BLOC_COUNT;
 		copy_bl2 = get_irom_func(MMC_INDEX);
diff --git a/arch/arm/include/asm/arch-exynos/power.h b/arch/arm/include/asm/arch-exynos/power.h
index 4f2447b3f8..e8a98a5471 100644
--- a/arch/arm/include/asm/arch-exynos/power.h
+++ b/arch/arm/include/asm/arch-exynos/power.h
@@ -1670,6 +1670,27 @@ struct exynos5420_power {
 };
 #endif	/* __ASSEMBLY__ */
 
+#define OM_PIN_BITS	0x1f
+#define OM_PIN_SHIFT	0x1
+#define OM_PIN_MASK	(OM_PIN_BITS << OM_PIN_SHIFT)
+
+enum {
+	/*
+	 * Assign the OM pin values for respective boot modes.
+	 * Exynos4 does not support spi boot and the mmc boot OM
+	 * pin values are the same across Exynos4 and Exynos5.
+	 */
+	BOOT_MODE_SD = 4,      /* SD_CH2  | USB */
+	BOOT_MODE_EMMC = 8,     /* EMMC4.4 | USB */
+	BOOT_MODE_EMMC_SD = 40, /* EMMC4.4 | SD_CH2 */
+	BOOT_MODE_SERIAL = 20,
+	/* Boot based on Operating Mode pin settings */
+	BOOT_MODE_OM = 32,
+	BOOT_MODE_USB,	/* Boot using USB download */
+};
+
+unsigned int get_boot_mode(void);
+
 void set_mipi_phy_ctrl(unsigned int dev_index, unsigned int enable);
 
 #define EXYNOS_MIPI_PHY_ENABLE		(1 << 0)
diff --git a/arch/arm/include/asm/arch-exynos/spl.h b/arch/arm/include/asm/arch-exynos/spl.h
index b1d68c3d21..cdcb2bc7ad 100644
--- a/arch/arm/include/asm/arch-exynos/spl.h
+++ b/arch/arm/include/asm/arch-exynos/spl.h
@@ -8,20 +8,7 @@
 #define __ASM_ARCH_EXYNOS_SPL_H__
 
 #include <asm/arch-exynos/dmc.h>
-
-enum boot_mode {
-	/*
-	 * Assign the OM pin values for respective boot modes.
-	 * Exynos4 does not support spi boot and the mmc boot OM
-	 * pin values are the same across Exynos4 and Exynos5.
-	 */
-	BOOT_MODE_MMC = 4,
-	BOOT_MODE_EMMC = 8,     /* EMMC4.4 */
-	BOOT_MODE_SERIAL = 20,
-	/* Boot based on Operating Mode pin settings */
-	BOOT_MODE_OM = 32,
-	BOOT_MODE_USB,	/* Boot using USB download */
-};
+#include <asm/arch/power.h>
 
 #ifndef __ASSEMBLY__
 /* Parameters of early board initialization in SPL */
@@ -62,7 +49,7 @@ struct spl_machine_param {
 	 * table only for mmc boot.
 	 */
 	u32		uboot_size;
-	enum boot_mode	boot_source;	/* Boot device */
+	unsigned	boot_source;	/* Boot device */
 	unsigned	frequency_mhz;	/* Frequency of memory in MHz */
 	unsigned	arm_freq_mhz;	/* ARM Frequency in MHz */
 	u32		serial_base;	/* Serial base address */