diff options
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-k3/config.mk | 2 | ||||
| -rw-r--r-- | arch/arm/mach-mediatek/mt7629/lowlevel_init.S | 52 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap3/Kconfig | 5 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap3/clock.c | 10 |
4 files changed, 55 insertions, 14 deletions
diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk index 7fc0b3f357..be00d79fb0 100644 --- a/arch/arm/mach-k3/config.mk +++ b/arch/arm/mach-k3/config.mk @@ -37,7 +37,7 @@ cmd_gencert = cat $(srctree)/tools/k3_x509template.txt | sed $(SED_OPTS) > u-boo ifeq ($(CONFIG_SYS_K3_KEY), "") KEY=u-boot-spl-eckey.pem else -KEY=$(patsubst "%",%,$(CONFIG_SYS_K3_KEY)) +KEY=$(patsubst "%",$(srctree)/%,$(CONFIG_SYS_K3_KEY)) endif u-boot-spl-eckey.pem: FORCE diff --git a/arch/arm/mach-mediatek/mt7629/lowlevel_init.S b/arch/arm/mach-mediatek/mt7629/lowlevel_init.S index 90dd4ea48e..3375796b79 100644 --- a/arch/arm/mach-mediatek/mt7629/lowlevel_init.S +++ b/arch/arm/mach-mediatek/mt7629/lowlevel_init.S @@ -5,6 +5,14 @@ #include <linux/linkage.h> +#define WAIT_CODE_SRAM_BASE 0x0010ff00 + +#define SLAVE_JUMP_REG 0x10202034 +#define SLAVE1_MAGIC_REG 0x10202038 +#define SLAVE1_MAGIC_NUM 0x534c4131 + +#define GIC_CPU_BASE 0x10320000 + ENTRY(lowlevel_init) #ifndef CONFIG_SPL_BUILD @@ -28,6 +36,7 @@ ENTRY(lowlevel_init) mrc p15, 0, r0, c0, c0, 5 ands r1, r0, #0x40000000 bne go @ Go if UP + /* read slave CPU number */ ands r0, r0, #0x0f beq go @ Go if core0 on primary core tile b secondary @@ -37,14 +46,41 @@ go: mov pc, lr secondary: - /* read slave CPU number into r0 firstly */ - mrc p15, 0, r0, c0, c0, 5 - and r0, r0, #0x0f + /* enable GIC as cores will be waken up by IPI */ + ldr r2, =GIC_CPU_BASE + mov r1, #0xf0 + str r1, [r2, #4] + mov r1, #1 + str r1, [r2, #0] + + ldr r1, [r2] + orr r1, #1 + str r1, [r2] + + /* copy wait code into SRAM */ + ldr r0, =slave_cpu_wait + ldm r0, {r1 - r8} @ slave_cpu_wait has eight insns + ldr r0, =WAIT_CODE_SRAM_BASE + stm r0, {r1 - r8} + + /* pass args to slave_cpu_wait */ + ldr r0, =SLAVE1_MAGIC_REG + ldr r1, =SLAVE1_MAGIC_NUM + + /* jump to wait code in SRAM */ + ldr pc, =WAIT_CODE_SRAM_BASE -loop: - dsb - isb - wfi @Zzz... - b loop #endif ENDPROC(lowlevel_init) + +/* This function will be copied into SRAM */ +ENTRY(slave_cpu_wait) + wfi + ldr r2, [r0] + cmp r2, r1 + bne slave_cpu_wait + movw r0, #:lower16:SLAVE_JUMP_REG + movt r0, #:upper16:SLAVE_JUMP_REG + ldr r1, [r0] + mov pc, r1 +ENDPROC(slave_cpu_wait) diff --git a/arch/arm/mach-omap2/omap3/Kconfig b/arch/arm/mach-omap2/omap3/Kconfig index e0d02fb4e5..0286b0daa3 100644 --- a/arch/arm/mach-omap2/omap3/Kconfig +++ b/arch/arm/mach-omap2/omap3/Kconfig @@ -3,18 +3,23 @@ if OMAP34XX # We only enable the clocks for the GPIO banks that a given board requies. config OMAP3_GPIO_2 bool + default y if CMD_GPIO config OMAP3_GPIO_3 bool + default y if CMD_GPIO config OMAP3_GPIO_4 bool + default y if CMD_GPIO config OMAP3_GPIO_5 bool + default y if CMD_GPIO config OMAP3_GPIO_6 bool + default y if CMD_GPIO choice prompt "OMAP3 board select" diff --git a/arch/arm/mach-omap2/omap3/clock.c b/arch/arm/mach-omap2/omap3/clock.c index 9a03bfa9d3..cb9e91ebc3 100644 --- a/arch/arm/mach-omap2/omap3/clock.c +++ b/arch/arm/mach-omap2/omap3/clock.c @@ -750,23 +750,23 @@ void per_clocks_enable(void) setbits_le32(&prcm_base->iclken_per, 0x00000800); #endif -#if (CONFIG_IS_ENABLED(OMAP3_GPIO_2) || CONFIG_IS_ENABLED(CMD_GPIO)) +#if defined(CONFIG_OMAP3_GPIO_2) setbits_le32(&prcm_base->fclken_per, 0x00002000); setbits_le32(&prcm_base->iclken_per, 0x00002000); #endif -#if (CONFIG_IS_ENABLED(OMAP3_GPIO_3) || CONFIG_IS_ENABLED(CMD_GPIO)) +#if defined(CONFIG_OMAP3_GPIO_3) setbits_le32(&prcm_base->fclken_per, 0x00004000); setbits_le32(&prcm_base->iclken_per, 0x00004000); #endif -#if (CONFIG_IS_ENABLED(OMAP3_GPIO_4) || CONFIG_IS_ENABLED(CMD_GPIO)) +#if defined(CONFIG_OMAP3_GPIO_4) setbits_le32(&prcm_base->fclken_per, 0x00008000); setbits_le32(&prcm_base->iclken_per, 0x00008000); #endif -#if (CONFIG_IS_ENABLED(OMAP3_GPIO_5) || CONFIG_IS_ENABLED(CMD_GPIO)) +#if defined(CONFIG_OMAP3_GPIO_5) setbits_le32(&prcm_base->fclken_per, 0x00010000); setbits_le32(&prcm_base->iclken_per, 0x00010000); #endif -#if (CONFIG_IS_ENABLED(OMAP3_GPIO_6) || CONFIG_IS_ENABLED(CMD_GPIO)) +#if defined(CONFIG_OMAP3_GPIO_6) setbits_le32(&prcm_base->fclken_per, 0x00020000); setbits_le32(&prcm_base->iclken_per, 0x00020000); #endif |