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-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/Kconfig8
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/fdt.c4
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c4
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S62
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/soc.c1
-rw-r--r--arch/arm/cpu/armv8/sec_firmware.c59
6 files changed, 93 insertions, 45 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 7edc06d202..546de33b72 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -469,6 +469,14 @@ config SYS_FSL_SDHC_CLK_DIV
help
This is the divider that is used to derive SDHC clock from Platform
clock, in another word SDHC_clk = Platform_clk / this_divider.
+
+config SYS_FSL_QMAN_CLK_DIV
+ int "QMAN clock divider"
+ default 1 if ARCH_LS1043A
+ default 2
+ help
+ This is the divider that is used to derive QMAN clock from Platform
+ clock, in another word QMAN_clk = Platform_clk / this_divider.
endmenu
config RESV_RAM
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index 4afc046eea..fc9de73bce 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -414,8 +414,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
ccsr_sec_t __iomem *sec;
#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
- if (fdt_fixup_kaslr(blob))
- fdt_fixup_remove_jr(blob);
+ fdt_fixup_remove_jr(blob);
+ fdt_fixup_kaslr(blob);
#endif
sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
index 8386678c46..723d7eac5d 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
@@ -155,7 +155,9 @@ void get_sys_info(struct sys_info *sys_info)
CONFIG_SYS_FSL_IFC_CLK_DIV;
#endif
#ifdef CONFIG_SYS_DPAA_QBMAN
- sys_info->freq_qman = sys_info->freq_systembus;
+ sys_info->freq_qman = (sys_info->freq_systembus /
+ CONFIG_SYS_FSL_PCLK_DIV) /
+ CONFIG_SYS_FSL_QMAN_CLK_DIV;
#endif
}
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
index e9d373e464..ef3987ea84 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
+++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
@@ -233,39 +233,45 @@ ENTRY(lowlevel_init)
* NOTE: As per the CCSR map doc, TZASC 3 and TZASC 4 are just
* placeholders.
*/
-#ifdef CONFIG_FSL_TZASC_1
- ldr x1, =TZASC_GATE_KEEPER(0)
- ldr w0, [x1] /* Filter 0 Gate Keeper Register */
- orr w0, w0, #1 << 0 /* Set open_request for Filter 0 */
- str w0, [x1]
- ldr x1, =TZASC_REGION_ATTRIBUTES_0(0)
- ldr w0, [x1] /* Region-0 Attributes Register */
- orr w0, w0, #1 << 31 /* Set Sec global write en, Bit[31] */
- orr w0, w0, #1 << 30 /* Set Sec global read en, Bit[30] */
- str w0, [x1]
+.macro tzasc_prog, xreg
+
+ mov x12, TZASC1_BASE
+ mov x16, #0x10000
+ mul x14, \xreg, x16
+ add x14, x14,x12
+ mov x1, #0x8
+ add x1, x1, x14
+
+ ldr w0, [x1] /* Filter 0 Gate Keeper Register */
+ orr w0, w0, #1 << 0 /* Set open_request for Filter 0 */
+ str w0, [x1]
+
+ mov x1, #0x110
+ add x1, x1, x14
+
+ ldr w0, [x1] /* Region-0 Attributes Register */
+ orr w0, w0, #1 << 31 /* Set Sec global write en, Bit[31] */
+ orr w0, w0, #1 << 30 /* Set Sec global read en, Bit[30] */
+ str w0, [x1]
+
+ mov x1, #0x114
+ add x1, x1, x14
+
+ ldr w0, [x1] /* Region-0 Access Register */
+ mov w0, #0xFFFFFFFF /* Set nsaid_wr_en and nsaid_rd_en */
+ str w0, [x1]
+.endm
+
+#ifdef CONFIG_FSL_TZASC_1
+ mov x13, #0
+ tzasc_prog x13
- ldr x1, =TZASC_REGION_ID_ACCESS_0(0)
- ldr w0, [x1] /* Region-0 Access Register */
- mov w0, #0xFFFFFFFF /* Set nsaid_wr_en and nsaid_rd_en */
- str w0, [x1]
#endif
#ifdef CONFIG_FSL_TZASC_2
- ldr x1, =TZASC_GATE_KEEPER(1)
- ldr w0, [x1] /* Filter 0 Gate Keeper Register */
- orr w0, w0, #1 << 0 /* Set open_request for Filter 0 */
- str w0, [x1]
-
- ldr x1, =TZASC_REGION_ATTRIBUTES_0(1)
- ldr w0, [x1] /* Region-1 Attributes Register */
- orr w0, w0, #1 << 31 /* Set Sec global write en, Bit[31] */
- orr w0, w0, #1 << 30 /* Set Sec global read en, Bit[30] */
- str w0, [x1]
+ mov x13, #1
+ tzasc_prog x13
- ldr x1, =TZASC_REGION_ID_ACCESS_0(1)
- ldr w0, [x1] /* Region-1 Attributes Register */
- mov w0, #0xFFFFFFFF /* Set nsaid_wr_en and nsaid_rd_en */
- str w0, [x1]
#endif
isb
dsb sy
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 06fdd17604..bfd663942a 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -517,6 +517,7 @@ static void erratum_a010539(void)
porsr1 &= ~FSL_CHASSIS2_CCSR_PORSR1_RCW_MASK;
out_be32((void *)(CONFIG_SYS_DCSR_DCFG_ADDR + DCFG_DCSR_PORCR1),
porsr1);
+ out_be32((void *)(CONFIG_SYS_FSL_SCFG_ADDR + 0x1a8), 0xffffffff);
#endif
}
diff --git a/arch/arm/cpu/armv8/sec_firmware.c b/arch/arm/cpu/armv8/sec_firmware.c
index 6a04eaca3e..a13c92e246 100644
--- a/arch/arm/cpu/armv8/sec_firmware.c
+++ b/arch/arm/cpu/armv8/sec_firmware.c
@@ -115,25 +115,48 @@ static int sec_firmware_check_copy_loadable(const void *sec_firmware_img,
u32 *loadable_l, u32 *loadable_h)
{
phys_addr_t sec_firmware_loadable_addr = 0;
- int conf_node_off, ld_node_off;
+ int conf_node_off, ld_node_off, images;
char *conf_node_name = NULL;
const void *data;
size_t size;
ulong load;
+ const char *name, *str, *type;
+ int len;
conf_node_name = SEC_FIRMEWARE_FIT_CNF_NAME;
conf_node_off = fit_conf_get_node(sec_firmware_img, conf_node_name);
if (conf_node_off < 0) {
printf("SEC Firmware: %s: no such config\n", conf_node_name);
- return -ENOENT;
+ return -ENOENT;
+ }
+
+ /* find the node holding the images information */
+ images = fdt_path_offset(sec_firmware_img, FIT_IMAGES_PATH);
+ if (images < 0) {
+ printf("%s: Cannot find /images node: %d\n", __func__, images);
+ return -1;
+ }
+
+ type = FIT_LOADABLE_PROP;
+
+ name = fdt_getprop(sec_firmware_img, conf_node_off, type, &len);
+ if (!name) {
+ /* Loadables not present */
+ return 0;
}
- ld_node_off = fit_conf_get_prop_node(sec_firmware_img, conf_node_off,
- FIT_LOADABLE_PROP);
- if (ld_node_off >= 0) {
- printf("SEC Firmware: '%s' present in config\n",
- FIT_LOADABLE_PROP);
+ printf("SEC Firmware: '%s' present in config\n", type);
+
+ for (str = name; str && ((str - name) < len);
+ str = strchr(str, '\0') + 1) {
+ printf("%s: '%s'\n", type, str);
+ ld_node_off = fdt_subnode_offset(sec_firmware_img, images, str);
+ if (ld_node_off < 0) {
+ printf("cannot find image node '%s': %d\n", str,
+ ld_node_off);
+ return -EINVAL;
+ }
/* Verify secure firmware image */
if (!(fit_image_verify(sec_firmware_img, ld_node_off))) {
@@ -163,11 +186,19 @@ static int sec_firmware_check_copy_loadable(const void *sec_firmware_img,
memcpy((void *)sec_firmware_loadable_addr, data, size);
flush_dcache_range(sec_firmware_loadable_addr,
sec_firmware_loadable_addr + size);
- }
- /* Populate address ptrs for loadable image with loadbale addr */
- out_le32(loadable_l, (sec_firmware_loadable_addr & WORD_MASK));
- out_le32(loadable_h, (sec_firmware_loadable_addr >> WORD_SHIFT));
+ /* Populate loadable address only for Trusted OS */
+ if (!strcmp(str, "trustedOS@1")) {
+ /*
+ * Populate address ptrs for loadable image with
+ * loadbale addr
+ */
+ out_le32(loadable_l, (sec_firmware_loadable_addr &
+ WORD_MASK));
+ out_le32(loadable_h, (sec_firmware_loadable_addr >>
+ WORD_SHIFT));
+ }
+ }
return 0;
}
@@ -317,9 +348,7 @@ unsigned int sec_firmware_support_psci_version(void)
*/
bool sec_firmware_support_hwrng(void)
{
- uint8_t rand[8];
if (sec_firmware_addr & SEC_FIRMWARE_RUNNING) {
- if (!sec_firmware_get_random(rand, 8))
return true;
}
@@ -428,8 +457,10 @@ int fdt_fixup_kaslr(void *fdt)
#if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT)
/* Check if random seed generation is supported */
- if (sec_firmware_support_hwrng() == false)
+ if (sec_firmware_support_hwrng() == false) {
+ printf("WARNING: SEC firmware not running, no kaslr-seed\n");
return 0;
+ }
ret = sec_firmware_get_random(rand, 8);
if (ret < 0) {
generated by cgit (git 2.34.1) at 2025-01-11 23:20:25 +0000