3 files changed, 2 insertions, 17 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 42d31fdab0..54d03ae622 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -245,14 +245,6 @@ config FSL_LSCH3
 config NXP_LSCH3_2
 	bool
 
-config FSL_MC_ENET
-	bool "Management Complex network"
-	depends on ARCH_LS2080A || ARCH_LS1088A || ARCH_LX2160A
-	default y
-	select RESV_RAM
-	help
-	  Enable Management Complex (MC) network
-
 menu "Layerscape architecture"
 	depends on FSL_LSCH2 || FSL_LSCH3
 
@@ -593,15 +585,6 @@ config SYS_FSL_HAS_RGMII
 	bool
 	depends on SYS_FSL_EC1 || SYS_FSL_EC2
 
-
-config SYS_MC_RSV_MEM_ALIGN
-	hex "Management Complex reserved memory alignment"
-	depends on RESV_RAM
-	default 0x20000000 if ARCH_LS2080A || ARCH_LS1088A || ARCH_LX2160A
-	help
-	  Reserved memory needs to be aligned for MC to use. Default value
-	  is 512MB.
-
 config SPL_LDSCRIPT
 	default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARCH_LS1043A || ARCH_LS1046A || ARCH_LS2080A
 
diff --git a/arch/arm/dts/armada-cp110-master.dtsi b/arch/arm/dts/armada-cp110-master.dtsi
index 551d00d774..e4c17e9f4b 100644
--- a/arch/arm/dts/armada-cp110-master.dtsi
+++ b/arch/arm/dts/armada-cp110-master.dtsi
@@ -96,6 +96,7 @@
 				#size-cells = <0>;
 				compatible = "marvell,orion-mdio";
 				reg = <0x12a200 0x10>;
+				device-name = "cpm-mdio";
 			};
 
 			cpm_syscon0: system-controller@440000 {
diff --git a/arch/arm/dts/armada-cp110-slave.dtsi b/arch/arm/dts/armada-cp110-slave.dtsi
index 2ea9004f1d..2fbd7b5514 100644
--- a/arch/arm/dts/armada-cp110-slave.dtsi
+++ b/arch/arm/dts/armada-cp110-slave.dtsi
@@ -96,6 +96,7 @@
 				#size-cells = <0>;
 				compatible = "marvell,orion-mdio";
 				reg = <0x12a200 0x10>;
+				device-name = "cps-mdio";
 			};
 
 			cps_syscon0: system-controller@440000 {