diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/Kconfig | 2 | ||||
-rw-r--r-- | arch/arm/mach-rmobile/Kconfig.32 | 4 | ||||
-rw-r--r-- | arch/arm/mach-uniphier/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/mach-uniphier/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/mach-uniphier/board_late_init.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-uniphier/dram_init.c | 35 | ||||
-rw-r--r-- | arch/arm/mach-uniphier/fdt-fixup.c | 64 |
7 files changed, 75 insertions, 40 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 692f4db600..8d0cb52c6b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1223,6 +1223,7 @@ config ARCH_UNIPHIER select DM_RESET select DM_SERIAL select DM_USB + select OF_BOARD_SETUP select OF_CONTROL select OF_LIBFDT select PINCTRL @@ -1233,6 +1234,7 @@ config ARCH_UNIPHIER select SPL_OF_CONTROL if SPL select SPL_PINCTRL if SPL select SUPPORT_SPL + imply DISTRO_DEFAULTS imply FAT_WRITE help Support for UniPhier SoC family developed by Socionext Inc. diff --git a/arch/arm/mach-rmobile/Kconfig.32 b/arch/arm/mach-rmobile/Kconfig.32 index c0b5b2457c..6c492ff409 100644 --- a/arch/arm/mach-rmobile/Kconfig.32 +++ b/arch/arm/mach-rmobile/Kconfig.32 @@ -13,18 +13,22 @@ config R8A7740 config R8A7790 bool "Renesas SoC R8A7790" select RCAR_GEN2 + select ARM_CORTEX_A15_CVE_2017_5715 config R8A7791 bool "Renesas SoC R8A7791" select RCAR_GEN2 + select ARM_CORTEX_A15_CVE_2017_5715 config R8A7792 bool "Renesas SoC R8A7792" select RCAR_GEN2 + select ARM_CORTEX_A15_CVE_2017_5715 config R8A7793 bool "Renesas SoC R8A7793" select RCAR_GEN2 + select ARM_CORTEX_A15_CVE_2017_5715 config R8A7794 bool "Renesas SoC R8A7794" diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index 91bea776e6..c199374086 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -68,7 +68,6 @@ config ARCH_UNIPHIER_LD11 config ARCH_UNIPHIER_LD20 bool "Enable UniPhier LD20 SoC support" depends on ARCH_UNIPHIER_V8_MULTI - select OF_BOARD_SETUP default y config ARCH_UNIPHIER_PXS3 diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index 269c51b853..d0c39d4273 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -21,6 +21,7 @@ endif obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc/ micro-support-card.o obj-y += pinctrl-glue.o obj-$(CONFIG_MMC) += mmc-first-dev.o +obj-y += fdt-fixup.o endif diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c index 6a995728d4..8ffb9a8d3c 100644 --- a/arch/arm/mach-uniphier/board_late_init.c +++ b/arch/arm/mach-uniphier/board_late_init.c @@ -66,20 +66,20 @@ int board_late_init(void) switch (uniphier_boot_device_raw()) { case BOOT_DEVICE_MMC1: printf("eMMC Boot"); - env_set("bootmode", "emmcboot"); + env_set("bootcmd", "run bootcmd_mmc0; run distro_bootcmd"); break; case BOOT_DEVICE_NAND: printf("NAND Boot"); - env_set("bootmode", "nandboot"); + env_set("bootcmd", "run bootcmd_ubifs0; run distro_bootcmd"); nand_denali_wp_disable(); break; case BOOT_DEVICE_NOR: printf("NOR Boot"); - env_set("bootmode", "norboot"); + env_set("bootcmd", "run tftpboot; run distro_bootcmd"); break; case BOOT_DEVICE_USB: printf("USB Boot"); - env_set("bootmode", "usbboot"); + env_set("bootcmd", "run bootcmd_usb0; run distro_bootcmd"); break; default: printf("Unknown"); diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index 2eb4836256..7e7c1d98db 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -6,8 +6,6 @@ */ #include <common.h> -#include <fdt_support.h> -#include <fdtdec.h> #include <linux/errno.h> #include <linux/kernel.h> #include <linux/printk.h> @@ -264,36 +262,3 @@ int dram_init_banksize(void) return 0; } - -#ifdef CONFIG_OF_BOARD_SETUP -/* - * The DRAM PHY requires 64 byte scratch area in each DRAM channel - * for its dynamic PHY training feature. - */ -int ft_board_setup(void *fdt, bd_t *bd) -{ - unsigned long rsv_addr; - const unsigned long rsv_size = 64; - int i, ret; - - if (uniphier_get_soc_id() != UNIPHIER_LD20_ID) - return 0; - - for (i = 0; i < ARRAY_SIZE(gd->bd->bi_dram); i++) { - if (!gd->bd->bi_dram[i].size) - continue; - - rsv_addr = gd->bd->bi_dram[i].start + gd->bd->bi_dram[i].size; - rsv_addr -= rsv_size; - - ret = fdt_add_mem_rsv(fdt, rsv_addr, rsv_size); - if (ret) - return -ENOSPC; - - pr_notice(" Reserved memory region for DRAM PHY training: addr=%lx size=%lx\n", - rsv_addr, rsv_size); - } - - return 0; -} -#endif diff --git a/arch/arm/mach-uniphier/fdt-fixup.c b/arch/arm/mach-uniphier/fdt-fixup.c new file mode 100644 index 0000000000..6f3c29d8c0 --- /dev/null +++ b/arch/arm/mach-uniphier/fdt-fixup.c @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016-2018 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + */ + +#include <common.h> +#include <fdt_support.h> +#include <fdtdec.h> +#include <jffs2/load_kernel.h> +#include <mtd_node.h> +#include <linux/kernel.h> +#include <linux/printk.h> + +#include "soc-info.h" + +/* + * The DRAM PHY requires 64 byte scratch area in each DRAM channel + * for its dynamic PHY training feature. + */ +static int uniphier_ld20_fdt_mem_rsv(void *fdt, bd_t *bd) +{ + unsigned long rsv_addr; + const unsigned long rsv_size = 64; + int i, ret; + + if (!IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD20) || + uniphier_get_soc_id() != UNIPHIER_LD20_ID) + return 0; + + for (i = 0; i < ARRAY_SIZE(bd->bi_dram); i++) { + if (!bd->bi_dram[i].size) + continue; + + rsv_addr = bd->bi_dram[i].start + bd->bi_dram[i].size; + rsv_addr -= rsv_size; + + ret = fdt_add_mem_rsv(fdt, rsv_addr, rsv_size); + if (ret) + return -ENOSPC; + + pr_notice(" Reserved memory region for DRAM PHY training: addr=%lx size=%lx\n", + rsv_addr, rsv_size); + } + + return 0; +} + +int ft_board_setup(void *fdt, bd_t *bd) +{ + static const struct node_info nodes[] = { + { "socionext,uniphier-denali-nand-v5a", MTD_DEV_TYPE_NAND }, + { "socionext,uniphier-denali-nand-v5b", MTD_DEV_TYPE_NAND }, + }; + int ret; + + fdt_fixup_mtdparts(fdt, nodes, ARRAY_SIZE(nodes)); + + ret = uniphier_ld20_fdt_mem_rsv(fdt, bd); + if (ret) + return ret; + + return 0; +} |