diff options
| author | Tom Rini <trini@konsulko.com> | 2018-07-26 11:43:26 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-07-26 11:43:26 -0400 |
| commit | ff6bef48529b8c49cad74371cfaa3b2175146c30 (patch) | |
| tree | 5e9338d60a34587929d72abdea65eb8b60bd63d9 /arch/arm | |
| parent | de4b4ef36ff61840eeb7d17be3bc9a4181c243f7 (diff) | |
| parent | 64eeb1585428b71e29022e22d1aae86b65b9e052 (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/Kconfig | 2 | ||||
| -rw-r--r-- | arch/arm/dts/socfpga_arria10.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/board.c | 4 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/misc_arria10.c | 13 |
4 files changed, 19 insertions, 4 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3d9b9dc83f..8d0cb52c6b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -766,6 +766,7 @@ config ARCH_SOCFPGA select DM_SERIAL select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 select OF_CONTROL + select SPL_DM_RESET if DM_RESET select SPL_LIBCOMMON_SUPPORT select SPL_LIBDISK_SUPPORT select SPL_LIBGENERIC_SUPPORT @@ -774,7 +775,6 @@ config ARCH_SOCFPGA select SPL_OF_CONTROL select SPL_SERIAL_SUPPORT select SPL_DM_SERIAL - select SPL_RESET_SUPPORT select SPL_SPI_FLASH_SUPPORT if SPL_SPI_SUPPORT select SPL_SPI_SUPPORT if DM_SPI select SPL_WATCHDOG_SUPPORT diff --git a/arch/arm/dts/socfpga_arria10.dtsi b/arch/arm/dts/socfpga_arria10.dtsi index b51febda9c..2f935a21e9 100644 --- a/arch/arm/dts/socfpga_arria10.dtsi +++ b/arch/arm/dts/socfpga_arria10.dtsi @@ -637,8 +637,8 @@ #address-cells = <1>; #size-cells = <1>; compatible = "denali,denali-nand-dt", "altr,socfpga-denali-nand"; - reg = <0xffb90000 0x72000>, - <0xffb80000 0x10000>; + reg = <0xffb90000 0x20>, + <0xffb80000 0x1000>; reg-names = "nand_data", "denali_reg"; interrupts = <0 99 4>; dma-mask = <0xffffffff>; diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c index 26d84be6e9..e8c7503fba 100644 --- a/arch/arm/mach-socfpga/board.c +++ b/arch/arm/mach-socfpga/board.c @@ -21,12 +21,14 @@ DECLARE_GLOBAL_DATA_PTR; void s_init(void) { #ifndef CONFIG_ARM64 /* - * Preconfigure ACTLR, make sure Write Full Line of Zeroes is disabled. + * Preconfigure ACTLR and CPACR, make sure Write Full Line of Zeroes + * is disabled in ACTLR. * This is optional on CycloneV / ArriaV. * This is mandatory on Arria10, otherwise Linux refuses to boot. */ asm volatile( "mcr p15, 0, %0, c1, c0, 1\n" + "mcr p15, 0, %0, c1, c0, 2\n" "isb\n" "dsb\n" ::"r"(0x0)); diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c index a75cbc4ce6..80bf2f036f 100644 --- a/arch/arm/mach-socfpga/misc_arria10.c +++ b/arch/arm/mach-socfpga/misc_arria10.c @@ -93,6 +93,19 @@ static void initialize_security_policies(void) /* Put OCRAM in non-secure */ writel(0x003f0000, &noc_fw_ocram_base->region0); writel(0x1, &noc_fw_ocram_base->enable); + + /* Put DDR in non-secure */ + writel(0xffff0000, SOCFPGA_SDR_FIREWALL_L3_ADDRESS + 0xc); + writel(0x1, SOCFPGA_SDR_FIREWALL_L3_ADDRESS); + + /* Enable priviledged and non-priviledged access to L4 peripherals */ + writel(~0, SOCFPGA_NOC_L4_PRIV_FLT_OFST); + + /* Enable secure and non-secure transactions to bridges */ + writel(~0, SOCFPGA_NOC_FW_H2F_SCR_OFST); + writel(~0, SOCFPGA_NOC_FW_H2F_SCR_OFST + 4); + + writel(0x0007FFFF, &sysmgr_regs->ecc_intmask_set); } int arch_early_init_r(void) |