diff options
Diffstat (limited to 'arch/avr32/include/asm')
30 files changed, 0 insertions, 2005 deletions
diff --git a/arch/avr32/include/asm/arch-at32ap700x/addrspace.h b/arch/avr32/include/asm/arch-at32ap700x/addrspace.h deleted file mode 100644 index 7b25e2efe6..0000000000 --- a/arch/avr32/include/asm/arch-at32ap700x/addrspace.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Copyright (C) 2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_AVR32_ADDRSPACE_H -#define __ASM_AVR32_ADDRSPACE_H - -#include <asm/types.h> - -/* Memory segments when segmentation is enabled */ -#define P0SEG 0x00000000 -#define P1SEG 0x80000000 -#define P2SEG 0xa0000000 -#define P3SEG 0xc0000000 -#define P4SEG 0xe0000000 - -/* Returns the privileged segment base of a given address */ -#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) - -/* Returns the physical address of a PnSEG (n=1,2) address */ -#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff) - -/* - * Map an address to a certain privileged segment - */ -#define P1SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG)) -#define P2SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG)) -#define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG)) -#define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG)) - -/* virt_to_phys will only work when address is in P1 or P2 */ -static inline unsigned long virt_to_phys(volatile void *address) -{ - return PHYSADDR(address); -} - -static inline void * phys_to_virt(unsigned long address) -{ - return (void *)P1SEGADDR(address); -} - -#define cached(addr) ((void *)P1SEGADDR(addr)) -#define uncached(addr) ((void *)P2SEGADDR(addr)) - -/* - * Given a physical address and a length, return a virtual address - * that can be used to access the memory range with the caching - * properties specified by "flags". - * - * This implementation works for memory below 512MiB (flash, etc.) as - * well as above 3.5GiB (internal peripherals.) - */ -#define MAP_NOCACHE (0) -#define MAP_WRCOMBINE (1 << 7) -#define MAP_WRBACK (MAP_WRCOMBINE | (1 << 9)) -#define MAP_WRTHROUGH (MAP_WRBACK | (1 << 0)) - -static inline void * -map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) -{ - return (void *)paddr; -} - -#endif /* __ASM_AVR32_ADDRSPACE_H */ diff --git a/arch/avr32/include/asm/arch-at32ap700x/cacheflush.h b/arch/avr32/include/asm/arch-at32ap700x/cacheflush.h deleted file mode 100644 index e08cd9de6d..0000000000 --- a/arch/avr32/include/asm/arch-at32ap700x/cacheflush.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Copyright (C) 2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_AVR32_CACHEFLUSH_H -#define __ASM_AVR32_CACHEFLUSH_H - -/* - * Invalidate any cacheline containing virtual address vaddr without - * writing anything back to memory. - * - * Note that this function may corrupt unrelated data structures when - * applied on buffers that are not cacheline aligned in both ends. - */ -static inline void dcache_invalidate_line(volatile void *vaddr) -{ - asm volatile("cache %0[0], 0x0b" : : "r"(vaddr) : "memory"); -} - -/* - * Make sure any cacheline containing virtual address vaddr is written - * to memory. - */ -static inline void dcache_clean_line(volatile void *vaddr) -{ - asm volatile("cache %0[0], 0x0c" : : "r"(vaddr) : "memory"); -} - -/* - * Make sure any cacheline containing virtual address vaddr is written - * to memory and then invalidate it. - */ -static inline void dcache_flush_line(volatile void *vaddr) -{ - asm volatile("cache %0[0], 0x0d" : : "r"(vaddr) : "memory"); -} - -/* - * Invalidate any instruction cacheline containing virtual address - * vaddr. - */ -static inline void icache_invalidate_line(volatile void *vaddr) -{ - asm volatile("cache %0[0], 0x01" : : "r"(vaddr) : "memory"); -} - -/* - * Applies the above functions on all lines that are touched by the - * specified virtual address range. - */ -void dcache_clean_range(volatile void *start, size_t len); -void icache_invalidate_range(volatile void *start, size_t len); - -static inline void dcache_flush_unlocked(void) -{ - asm volatile("cache %0[5], 0x08" : : "r"(0) : "memory"); -} - -/* - * Make sure any pending writes are completed before continuing. - */ -#define sync_write_buffer() asm volatile("sync 0" : : : "memory") - -#endif /* __ASM_AVR32_CACHEFLUSH_H */ diff --git a/arch/avr32/include/asm/arch-at32ap700x/chip-features.h b/arch/avr32/include/asm/arch-at32ap700x/chip-features.h deleted file mode 100644 index 822286df5f..0000000000 --- a/arch/avr32/include/asm/arch-at32ap700x/chip-features.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright (C) 2007 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_AVR32_ARCH_CHIP_FEATURES_H__ -#define __ASM_AVR32_ARCH_CHIP_FEATURES_H__ - -/* Currently, all the AP700x chips have these */ -#define AT32AP700x_CHIP_HAS_USART -#define AT32AP700x_CHIP_HAS_MMCI -#define AT32AP700x_CHIP_HAS_SPI - -/* Only AP7000 has ethernet interface */ -#ifdef CONFIG_AT32AP7000 -#define AT32AP700x_CHIP_HAS_MACB -#endif - -/* AP7000 and AP7002 have LCD controller, but AP7001 does not */ -#if defined(CONFIG_AT32AP7000) || defined(CONFIG_AT32AP7002) -#define AT32AP700x_CHIP_HAS_LCDC -#endif - -#endif /* __ASM_AVR32_ARCH_CHIP_FEATURES_H__ */ diff --git a/arch/avr32/include/asm/arch-at32ap700x/clk.h b/arch/avr32/include/asm/arch-at32ap700x/clk.h deleted file mode 100644 index 0721899fde..0000000000 --- a/arch/avr32/include/asm/arch-at32ap700x/clk.h +++ /dev/null @@ -1,175 +0,0 @@ -/* - * Copyright (C) 2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_AVR32_ARCH_CLK_H__ -#define __ASM_AVR32_ARCH_CLK_H__ - -#include <asm/arch/chip-features.h> -#include <asm/arch/portmux.h> - -#ifdef CONFIG_PLL -#define PLL0_RATE ((CONFIG_SYS_OSC0_HZ / CONFIG_SYS_PLL0_DIV) \ - * CONFIG_SYS_PLL0_MUL) -#define MAIN_CLK_RATE PLL0_RATE -#else -#define MAIN_CLK_RATE (CONFIG_SYS_OSC0_HZ) -#endif - -static inline unsigned long get_cpu_clk_rate(void) -{ - return MAIN_CLK_RATE >> CONFIG_SYS_CLKDIV_CPU; -} -static inline unsigned long get_hsb_clk_rate(void) -{ - return MAIN_CLK_RATE >> CONFIG_SYS_CLKDIV_HSB; -} -static inline unsigned long get_pba_clk_rate(void) -{ - return MAIN_CLK_RATE >> CONFIG_SYS_CLKDIV_PBA; -} -static inline unsigned long get_pbb_clk_rate(void) -{ - return MAIN_CLK_RATE >> CONFIG_SYS_CLKDIV_PBB; -} - -/* Accessors for specific devices. More will be added as needed. */ -static inline unsigned long get_sdram_clk_rate(void) -{ - return get_hsb_clk_rate(); -} -#ifdef AT32AP700x_CHIP_HAS_USART -static inline unsigned long get_usart_clk_rate(unsigned int dev_id) -{ - return get_pba_clk_rate(); -} -#endif -#ifdef AT32AP700x_CHIP_HAS_MACB -static inline unsigned long get_macb_pclk_rate(unsigned int dev_id) -{ - return get_pbb_clk_rate(); -} -static inline unsigned long get_macb_hclk_rate(unsigned int dev_id) -{ - return get_hsb_clk_rate(); -} -#endif -#ifdef AT32AP700x_CHIP_HAS_MMCI -static inline unsigned long get_mci_clk_rate(void) -{ - return get_pbb_clk_rate(); -} -#endif -#ifdef AT32AP700x_CHIP_HAS_SPI -static inline unsigned long get_spi_clk_rate(unsigned int dev_id) -{ - return get_pba_clk_rate(); -} -#endif -#ifdef AT32AP700x_CHIP_HAS_LCDC -static inline unsigned long get_lcdc_clk_rate(unsigned int dev_id) -{ - return get_hsb_clk_rate(); -} -#endif - -extern void clk_init(void); - -/* Board code may need the SDRAM base clock as a compile-time constant */ -#define SDRAMC_BUS_HZ (MAIN_CLK_RATE >> CONFIG_SYS_CLKDIV_HSB) - -/* Generic clock control */ -enum gclk_parent { - GCLK_PARENT_OSC0 = 0, - GCLK_PARENT_OSC1 = 1, - GCLK_PARENT_PLL0 = 2, - GCLK_PARENT_PLL1 = 3, -}; - -/* Some generic clocks have specific roles */ -#define GCLK_DAC_SAMPLE_CLK 6 -#define GCLK_LCDC_PIXCLK 7 - -extern unsigned long __gclk_set_rate(unsigned int id, enum gclk_parent parent, - unsigned long rate, unsigned long parent_rate); - -/** - * gclk_set_rate - configure and enable a generic clock - * @id: Which GCLK[id] to enable - * @parent: Parent clock feeding the GCLK - * @rate: Target rate of the GCLK in Hz - * - * Returns the actual GCLK rate in Hz, after rounding to the nearest - * supported rate. - * - * All three parameters are usually constant, hence the inline. - */ -static inline unsigned long gclk_set_rate(unsigned int id, - enum gclk_parent parent, unsigned long rate) -{ - unsigned long parent_rate; - - if (id > 7) - return 0; - - switch (parent) { - case GCLK_PARENT_OSC0: - parent_rate = CONFIG_SYS_OSC0_HZ; - break; -#ifdef CONFIG_SYS_OSC1_HZ - case GCLK_PARENT_OSC1: - parent_rate = CONFIG_SYS_OSC1_HZ; - break; -#endif -#ifdef PLL0_RATE - case GCLK_PARENT_PLL0: - parent_rate = PLL0_RATE; - break; -#endif -#ifdef PLL1_RATE - case GCLK_PARENT_PLL1: - parent_rate = PLL1_RATE; - break; -#endif - default: - parent_rate = 0; - break; - } - - return __gclk_set_rate(id, parent, rate, parent_rate); -} - -/** - * gclk_enable_output - enable output on a GCLK pin - * @id: Which GCLK[id] pin to enable - * @drive_strength: Drive strength of external GCLK pin, if applicable - */ -static inline void gclk_enable_output(unsigned int id, - unsigned long drive_strength) -{ - switch (id) { - case 0: - portmux_select_peripheral(PORTMUX_PORT_A, 1 << 30, - PORTMUX_FUNC_A, drive_strength); - break; - case 1: - portmux_select_peripheral(PORTMUX_PORT_A, 1 << 31, - PORTMUX_FUNC_A, drive_strength); - break; - case 2: - portmux_select_peripheral(PORTMUX_PORT_B, 1 << 19, - PORTMUX_FUNC_A, drive_strength); - break; - case 3: - portmux_select_peripheral(PORTMUX_PORT_B, 1 << 29, - PORTMUX_FUNC_A, drive_strength); - break; - case 4: - portmux_select_peripheral(PORTMUX_PORT_B, 1 << 30, - PORTMUX_FUNC_A, drive_strength); - break; - } -} - -#endif /* __ASM_AVR32_ARCH_CLK_H__ */ diff --git a/arch/avr32/include/asm/arch-at32ap700x/gpio.h b/arch/avr32/include/asm/arch-at32ap700x/gpio.h deleted file mode 100644 index b5808c5d45..0000000000 --- a/arch/avr32/include/asm/arch-at32ap700x/gpio.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (C) 2006, 2008 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_AVR32_ARCH_GPIO_H__ -#define __ASM_AVR32_ARCH_GPIO_H__ - -#include <asm/arch/chip-features.h> -#include <asm/arch/hardware.h> - -#define NR_GPIO_CONTROLLERS 5 - -/* - * Pin numbers identifying specific GPIO pins on the chip. - */ -#define GPIO_PIOA_BASE (0) -#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32) -#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32) -#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32) -#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32) -#define GPIO_PIN_PA(x) (GPIO_PIOA_BASE + (x)) -#define GPIO_PIN_PB(x) (GPIO_PIOB_BASE + (x)) -#define GPIO_PIN_PC(x) (GPIO_PIOC_BASE + (x)) -#define GPIO_PIN_PD(x) (GPIO_PIOD_BASE + (x)) -#define GPIO_PIN_PE(x) (GPIO_PIOE_BASE + (x)) - -static inline void *pio_pin_to_port(unsigned int pin) -{ - switch (pin >> 5) { - case 0: - return (void *)ATMEL_BASE_PIOA; - case 1: - return (void *)ATMEL_BASE_PIOB; - case 2: - return (void *)ATMEL_BASE_PIOC; - case 3: - return (void *)ATMEL_BASE_PIOD; - case 4: - return (void *)ATMEL_BASE_PIOE; - default: - return NULL; - } -} - -#include <asm/arch-common/portmux-pio.h> - -#endif /* __ASM_AVR32_ARCH_GPIO_H__ */ diff --git a/arch/avr32/include/asm/arch-at32ap700x/hardware.h b/arch/avr32/include/asm/arch-at32ap700x/hardware.h deleted file mode 100644 index 58ae965259..0000000000 --- a/arch/avr32/include/asm/arch-at32ap700x/hardware.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright (C) 2005-2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __AT32AP7000_HARDWARE_H__ -#define __AT32AP7000_HARDWARE_H__ - -/* Internal and external memories */ -#define EBI_SRAM_CS0_BASE 0x00000000 -#define EBI_SRAM_CS0_SIZE 0x04000000 -#define EBI_SRAM_CS4_BASE 0x04000000 -#define EBI_SRAM_CS4_SIZE 0x04000000 -#define EBI_SRAM_CS2_BASE 0x08000000 -#define EBI_SRAM_CS2_SIZE 0x04000000 -#define EBI_SRAM_CS3_BASE 0x0c000000 -#define EBI_SRAM_CS3_SIZE 0x04000000 -#define EBI_SRAM_CS1_BASE 0x10000000 -#define EBI_SRAM_CS1_SIZE 0x10000000 -#define EBI_SRAM_CS5_BASE 0x20000000 -#define EBI_SRAM_CS5_SIZE 0x04000000 - -#define EBI_SDRAM_BASE EBI_SRAM_CS1_BASE -#define EBI_SDRAM_SIZE EBI_SRAM_CS1_SIZE - -#define INTERNAL_SRAM_BASE 0x24000000 -#define INTERNAL_SRAM_SIZE 0x00008000 - -/* Devices on the High Speed Bus (HSB) */ -#define LCDC_BASE 0xFF000000 -#define DMAC_BASE 0xFF200000 -#define USB_FIFO 0xFF300000 - -/* Devices on Peripheral Bus A (PBA) */ -#define ATMEL_BASE_SPI0 0xFFE00000 -#define ATMEL_BASE_SPI1 0xFFE00400 -#define ATMEL_BASE_TWI0 0xFFE00800 -#define ATMEL_BASE_USART0 0xFFE00C00 -#define ATMEL_BASE_USART1 0xFFE01000 -#define ATMEL_BASE_USART2 0xFFE01400 -#define ATMEL_BASE_USART3 0xFFE01800 -#define ATMEL_BASE_SSC0 0xFFE01C00 -#define ATMEL_BASE_SSC1 0xFFE02000 -#define ATMEL_BASE_SSC2 0xFFE02400 -#define ATMEL_BASE_PIOA 0xFFE02800 -#define ATMEL_BASE_PIOB 0xFFE02C00 -#define ATMEL_BASE_PIOC 0xFFE03000 -#define ATMEL_BASE_PIOD 0xFFE03400 -#define ATMEL_BASE_PIOE 0xFFE03800 -#define ATMEL_BASE_PSIF 0xFFE03C00 - -/* Devices on Peripheral Bus B (PBB) */ -#define ATMEL_BASE_SM 0xFFF00000 -#define ATMEL_BASE_INTC 0xFFF00400 -#define ATMEL_BASE_HMATRIX 0xFFF00800 -#define ATMEL_BASE_TIMER0 0xFFF00C00 -#define ATMEL_BASE_TIMER1 0xFFF01000 -#define ATMEL_BASE_PWM 0xFFF01400 -#define ATMEL_BASE_MACB0 0xFFF01800 -#define ATMEL_BASE_MACB1 0xFFF01C00 -#define ATMEL_BASE_DAC 0xFFF02000 -#define ATMEL_BASE_MMCI 0xFFF02400 -#define ATMEL_BASE_AUDIOC 0xFFF02800 -#define ATMEL_BASE_HISI 0xFFF02C00 -#define ATMEL_BASE_USB 0xFFF03000 -#define ATMEL_BASE_HSMC 0xFFF03400 -#define ATMEL_BASE_HSDRAMC 0xFFF03800 -#define ATMEL_BASE_ECC 0xFFF03C00 - -#endif /* __AT32AP7000_HARDWARE_H__ */ diff --git a/arch/avr32/include/asm/arch-at32ap700x/hmatrix.h b/arch/avr32/include/asm/arch-at32ap700x/hmatrix.h deleted file mode 100644 index d2a733fa40..0000000000 --- a/arch/avr32/include/asm/arch-at32ap700x/hmatrix.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Copyright (C) 2008 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_AVR32_ARCH_HMATRIX_H__ -#define __ASM_AVR32_ARCH_HMATRIX_H__ - -#include <asm/hmatrix-common.h> - -/* Bitfields in SFR4 (EBI) */ -#define HMATRIX_EBI_SDRAM_ENABLE_OFFSET 1 -#define HMATRIX_EBI_SDRAM_ENABLE_SIZE 1 -#define HMATRIX_EBI_NAND_ENABLE_OFFSET 3 -#define HMATRIX_EBI_NAND_ENABLE_SIZE 1 -#define HMATRIX_EBI_CF0_ENABLE_OFFSET 4 -#define HMATRIX_EBI_CF0_ENABLE_SIZE 1 -#define HMATRIX_EBI_CF1_ENABLE_OFFSET 5 -#define HMATRIX_EBI_CF1_ENABLE_SIZE 1 -#define HMATRIX_EBI_PULLUP_DISABLE_OFFSET 8 -#define HMATRIX_EBI_PULLUP_DISABLE_SIZE 1 - -/* HSB masters */ -#define HMATRIX_MASTER_CPU_DCACHE 0 -#define HMATRIX_MASTER_CPU_ICACHE 1 -#define HMATRIX_MASTER_PDC 2 -#define HMATRIX_MASTER_ISI 3 -#define HMATRIX_MASTER_USBA 4 -#define HMATRIX_MASTER_LCDC 5 -#define HMATRIX_MASTER_MACB0 6 -#define HMATRIX_MASTER_MACB1 7 -#define HMATRIX_MASTER_DMACA_M0 8 -#define HMATRIX_MASTER_DMACA_M1 9 - -/* HSB slaves */ -#define HMATRIX_SLAVE_SRAM0 0 -#define HMATRIX_SLAVE_SRAM1 1 -#define HMATRIX_SLAVE_PBA 2 -#define HMATRIX_SLAVE_PBB 3 -#define HMATRIX_SLAVE_EBI 4 -#define HMATRIX_SLAVE_USBA 5 -#define HMATRIX_SLAVE_LCDC 6 -#define HMATRIX_SLAVE_DMACA 7 - -#endif /* __ASM_AVR32_ARCH_HMATRIX_H__ */ diff --git a/arch/avr32/include/asm/arch-at32ap700x/mmu.h b/arch/avr32/include/asm/arch-at32ap700x/mmu.h deleted file mode 100644 index 4736312f5d..0000000000 --- a/arch/avr32/include/asm/arch-at32ap700x/mmu.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * In order to deal with the hardcoded u-boot requirement that virtual - * addresses are always mapped 1:1 with physical addresses, we implement - * a small virtual memory manager so that we can use the MMU hardware in - * order to get the caching properties right. - * - * A few pages (or possibly just one) are locked in the TLB permanently - * in order to avoid recursive TLB misses, but most pages are faulted in - * on demand. - */ -#ifndef __ASM_ARCH_MMU_H -#define __ASM_ARCH_MMU_H - -#include <asm/sysreg.h> - -#define MMU_PAGE_SHIFT 20 -#define MMU_PAGE_SIZE (1UL << MMU_PAGE_SHIFT) -#define MMU_PAGE_ADDR_MASK (~(MMU_PAGE_SIZE - 1)) - -#define MMU_VMR_CACHE_NONE \ - (SYSREG_BF(AP, 3) | SYSREG_BF(SZ, 3) | SYSREG_BIT(TLBELO_D)) -#define MMU_VMR_CACHE_WBUF \ - (MMU_VMR_CACHE_NONE | SYSREG_BIT(B)) -#define MMU_VMR_CACHE_WRTHRU \ - (MMU_VMR_CACHE_NONE | SYSREG_BIT(TLBELO_C) | SYSREG_BIT(W)) -#define MMU_VMR_CACHE_WRBACK \ - (MMU_VMR_CACHE_WBUF | SYSREG_BIT(TLBELO_C)) - -/* - * This structure is used in our "page table". Instead of the usual - * x86-inspired radix tree, we let each entry cover an arbitrary-sized - * virtual address range and store them in a binary search tree. This is - * somewhat slower, but should use significantly less RAM, and we - * shouldn't get many TLB misses when using 1 MB pages anyway. - * - * With 1 MB pages, we need 12 bits to store the page number. In - * addition, we stick an Invalid bit in the high bit of virt_pgno (if - * set, it cannot possibly match any faulting page), and all the bits - * that need to be written to TLBELO in phys_pgno. - */ -struct mmu_vm_range { - uint16_t virt_pgno; - uint16_t nr_pages; - uint32_t phys; -}; - -/* - * An array of mmu_vm_range objects describing all pageable addresses. - * The array is sorted by virt_pgno so that the TLB miss exception - * handler can do a binary search to find the correct entry. - */ -extern struct mmu_vm_range mmu_vmr_table[]; - -/* - * Initialize the MMU. This will set up a fixed TLB entry for the static - * u-boot image at dest_addr and enable paging. - */ -void mmu_init_r(unsigned long dest_addr); - -/* - * Handle a TLB miss exception. This function is called directly from - * the exception vector table written in assembly. - */ -int mmu_handle_tlb_miss(void); - -#endif /* __ASM_ARCH_MMU_H */ diff --git a/arch/avr32/include/asm/arch-at32ap700x/portmux.h b/arch/avr32/include/asm/arch-at32ap700x/portmux.h deleted file mode 100644 index 7ae05408c0..0000000000 --- a/arch/avr32/include/asm/arch-at32ap700x/portmux.h +++ /dev/null @@ -1,76 +0,0 @@ -/* - * Copyright (C) 2006, 2008 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_AVR32_ARCH_PORTMUX_H__ -#define __ASM_AVR32_ARCH_PORTMUX_H__ - -#include <asm/arch/gpio.h> - -#define PORTMUX_PORT_A ((void *)ATMEL_BASE_PIOA) -#define PORTMUX_PORT_B ((void *)ATMEL_BASE_PIOB) -#define PORTMUX_PORT_C ((void *)ATMEL_BASE_PIOC) -#define PORTMUX_PORT_D ((void *)ATMEL_BASE_PIOD) -#define PORTMUX_PORT_E ((void *)ATMEL_BASE_PIOE) - -void portmux_enable_ebi(unsigned int bus_width, unsigned int addr_width, - unsigned long flags, unsigned long drive_strength); - -#define PORTMUX_EBI_CS(x) (1 << (x)) -#define PORTMUX_EBI_NAND (1 << 6) -#define PORTMUX_EBI_CF(x) (1 << ((x) + 7)) -#define PORTMUX_EBI_NWAIT (1 << 9) - -#ifdef AT32AP700x_CHIP_HAS_USART -static inline void portmux_enable_usart0(unsigned long drive_strength) -{ - portmux_select_peripheral(PORTMUX_PORT_A, (1 << 8) | (1 << 9), - PORTMUX_FUNC_B, 0); -} - -static inline void portmux_enable_usart1(unsigned long drive_strength) -{ - portmux_select_peripheral(PORTMUX_PORT_A, (1 << 17) | (1 << 18), - PORTMUX_FUNC_A, 0); -} - -static inline void portmux_enable_usart2(unsigned long drive_strength) -{ - portmux_select_peripheral(PORTMUX_PORT_B, (1 << 26) | (1 << 27), - PORTMUX_FUNC_B, 0); -} - -static inline void portmux_enable_usart3(unsigned long drive_strength) -{ - portmux_select_peripheral(PORTMUX_PORT_B, (1 << 17) | (1 << 18), - PORTMUX_FUNC_B, 0); -} -#endif -#ifdef AT32AP700x_CHIP_HAS_MACB -void portmux_enable_macb0(unsigned long flags, unsigned long drive_strength); -void portmux_enable_macb1(unsigned long flags, unsigned long drive_strength); - -#define PORTMUX_MACB_RMII (0) -#define PORTMUX_MACB_MII (1 << 0) -#define PORTMUX_MACB_SPEED (1 << 1) - -#endif -#ifdef AT32AP700x_CHIP_HAS_MMCI -void portmux_enable_mmci(unsigned int slot, unsigned long flags, - unsigned long drive_strength); - -#define PORTMUX_MMCI_4BIT (1 << 0) -#define PORTMUX_MMCI_8BIT (PORTMUX_MMCI_4BIT | (1 << 1)) -#define PORTMUX_MMCI_EXT_PULLUP (1 << 2) - -#endif -#ifdef AT32AP700x_CHIP_HAS_SPI -void portmux_enable_spi0(unsigned long cs_mask, unsigned long drive_strength); -void portmux_enable_spi1(unsigned long cs_mask, unsigned long drive_strength); -#endif -#ifdef AT32AP700x_CHIP_HAS_LCDC -void portmux_enable_lcdc(int pin_config); -#endif - -#endif /* __ASM_AVR32_ARCH_PORTMUX_H__ */ diff --git a/arch/avr32/include/asm/arch-common/portmux-pio.h b/arch/avr32/include/asm/arch-common/portmux-pio.h deleted file mode 100644 index 0d4d6e01e5..0000000000 --- a/arch/avr32/include/asm/arch-common/portmux-pio.h +++ /dev/null @@ -1,122 +0,0 @@ -/* - * Copyright (C) 2006, 2008 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __AVR32_PORTMUX_PIO_H__ -#define __AVR32_PORTMUX_PIO_H__ - -#include <asm/io.h> - -/* PIO register offsets */ -#define PIO_PER 0x0000 -#define PIO_PDR 0x0004 -#define PIO_PSR 0x0008 -#define PIO_OER 0x0010 -#define PIO_ODR 0x0014 -#define PIO_OSR 0x0018 -#define PIO_IFER 0x0020 -#define PIO_IFDR 0x0024 -#define PIO_ISFR 0x0028 -#define PIO_SODR 0x0030 -#define PIO_CODR 0x0034 -#define PIO_ODSR 0x0038 -#define PIO_PDSR 0x003c -#define PIO_IER 0x0040 -#define PIO_IDR 0x0044 -#define PIO_IMR 0x0048 -#define PIO_ISR 0x004c -#define PIO_MDER 0x0050 -#define PIO_MDDR 0x0054 -#define PIO_MDSR 0x0058 -#define PIO_PUDR 0x0060 -#define PIO_PUER 0x0064 -#define PIO_PUSR 0x0068 -#define PIO_ASR 0x0070 -#define PIO_BSR 0x0074 -#define PIO_ABSR 0x0078 -#define PIO_OWER 0x00a0 -#define PIO_OWDR 0x00a4 -#define PIO_OWSR 0x00a8 - -/* Hardware register access */ -#define pio_readl(base, reg) \ - __raw_readl((void *)base + PIO_##reg) -#define pio_writel(base, reg, value) \ - __raw_writel((value), (void *)base + PIO_##reg) - -/* Portmux API starts here. See doc/README.AVR32-port-muxing */ - -enum portmux_function { - PORTMUX_FUNC_A, - PORTMUX_FUNC_B, -}; - -/* Pull-down, buskeeper and drive strength are not supported */ -#define PORTMUX_DIR_INPUT (0 << 0) -#define PORTMUX_DIR_OUTPUT (1 << 0) -#define PORTMUX_INIT_LOW (0 << 1) -#define PORTMUX_INIT_HIGH (1 << 1) -#define PORTMUX_PULL_UP (1 << 2) -#define PORTMUX_PULL_DOWN (0) -#define PORTMUX_BUSKEEPER PORTMUX_PULL_UP -#define PORTMUX_DRIVE_MIN (0) -#define PORTMUX_DRIVE_LOW (0) -#define PORTMUX_DRIVE_HIGH (0) -#define PORTMUX_DRIVE_MAX (0) -#define PORTMUX_OPEN_DRAIN (1 << 3) - -void portmux_select_peripheral(void *port, unsigned long pin_mask, - enum portmux_function func, unsigned long flags); -void portmux_select_gpio(void *port, unsigned long pin_mask, - unsigned long flags); - -/* Internal helper functions */ - -static inline void __pio_set_output_value(void *port, unsigned int pin, - int value) -{ - /* - * value will usually be constant, but it's pretty cheap - * either way. - */ - if (value) - pio_writel(port, SODR, 1 << pin); - else - pio_writel(port, CODR, 1 << pin); -} - -static inline int __pio_get_input_value(void *port, unsigned int pin) -{ - return (pio_readl(port, PDSR) >> pin) & 1; -} - -void pio_set_output_value(unsigned int pin, int value); -int pio_get_input_value(unsigned int pin); - -/* GPIO API starts here */ - -/* - * GCC doesn't realize that the constant case is extremely trivial, - * so we need to help it make the right decision by using - * always_inline. - */ -__attribute__((always_inline)) -static inline void gpio_set_value(unsigned int pin, int value) -{ - if (__builtin_constant_p(pin)) - __pio_set_output_value(pio_pin_to_port(pin), pin & 0x1f, value); - else - pio_set_output_value(pin, value); -} - -__attribute__((always_inline)) -static inline int gpio_get_value(unsigned int pin) -{ - if (__builtin_constant_p(pin)) - return __pio_get_input_value(pio_pin_to_port(pin), pin & 0x1f); - else - return pio_get_input_value(pin); -} - -#endif /* __AVR32_PORTMUX_PIO_H__ */ diff --git a/arch/avr32/include/asm/bitops.h b/arch/avr32/include/asm/bitops.h deleted file mode 100644 index 0d425c20f9..0000000000 --- a/arch/avr32/include/asm/bitops.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright (C) 2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_AVR32_BITOPS_H -#define __ASM_AVR32_BITOPS_H - -#include <asm-generic/bitops/fls.h> -#include <asm-generic/bitops/__fls.h> -#include <asm-generic/bitops/fls64.h> -#include <asm-generic/bitops/__ffs.h> - -#endif /* __ASM_AVR32_BITOPS_H */ diff --git a/arch/avr32/include/asm/byteorder.h b/arch/avr32/include/asm/byteorder.h deleted file mode 100644 index 25e9aff425..0000000000 --- a/arch/avr32/include/asm/byteorder.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright (C) 2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_AVR32_BYTEORDER_H -#define __ASM_AVR32_BYTEORDER_H - -#include <asm/types.h> - -#define __arch__swab32(x) __builtin_bswap_32(x) -#define __arch__swab16(x) __builtin_bswap_16(x) - -#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__ -#endif - -#include <linux/byteorder/big_endian.h> - -#endif /* __ASM_AVR32_BYTEORDER_H */ diff --git a/arch/avr32/include/asm/cache.h b/arch/avr32/include/asm/cache.h deleted file mode 100644 index 486284398e..0000000000 --- a/arch/avr32/include/asm/cache.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __AVR32_CACHE_H__ -#define __AVR32_CACHE_H__ - -/* - * Since the AVR32 architecture has a queryable cacheline size with a maximum - * value of 256 we set the DMA buffer alignemnt requirement to this maximum - * value. The board config can override this if it knows that the cacheline - * size is a smaller value. AVR32 boards use the CONFIG_SYS_DCACHE_LINESZ - * macro to specify cache line size, so if it is set we use it instead. - */ -#ifdef CONFIG_SYS_CACHELINE_SIZE -#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE -#elif defined(CONFIG_SYS_DCACHE_LINESZ) -#define ARCH_DMA_MINALIGN CONFIG_SYS_DCACHE_LINESZ -#else -#define ARCH_DMA_MINALIGN 256 -#endif - -#endif /* __AVR32_CACHE_H__ */ diff --git a/arch/avr32/include/asm/config.h b/arch/avr32/include/asm/config.h deleted file mode 100644 index 529fe227a6..0000000000 --- a/arch/avr32/include/asm/config.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * Copyright 2009 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _ASM_CONFIG_H_ -#define _ASM_CONFIG_H_ - -#define CONFIG_NEEDS_MANUAL_RELOC -#define CONFIG_SYS_GENERIC_GLOBAL_DATA - -#endif diff --git a/arch/avr32/include/asm/dma-mapping.h b/arch/avr32/include/asm/dma-mapping.h deleted file mode 100644 index 1cde8275f4..0000000000 --- a/arch/avr32/include/asm/dma-mapping.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (C) 2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_AVR32_DMA_MAPPING_H -#define __ASM_AVR32_DMA_MAPPING_H - -#include <asm/io.h> -#include <asm/arch/cacheflush.h> - -enum dma_data_direction { - DMA_BIDIRECTIONAL = 0, - DMA_TO_DEVICE = 1, - DMA_FROM_DEVICE = 2, -}; - -static inline void *dma_alloc_coherent(size_t len, unsigned long *handle) -{ - *handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, len); - return (void *)*handle; -} - -static inline unsigned long dma_map_single(volatile void *vaddr, size_t len, - enum dma_data_direction dir) -{ - extern void __bad_dma_data_direction(void); - - switch (dir) { - case DMA_BIDIRECTIONAL: - flush_dcache_range((unsigned long)vaddr, - (unsigned long)vaddr + len); - break; - case DMA_TO_DEVICE: - dcache_clean_range(vaddr, len); - break; - case DMA_FROM_DEVICE: - invalidate_dcache_range((unsigned long)vaddr, - (unsigned long)vaddr + len); - break; - default: - /* This will cause a linker error */ - __bad_dma_data_direction(); - } - - return virt_to_phys(vaddr); -} - -static inline void dma_unmap_single(volatile void *vaddr, size_t len, - unsigned long paddr) -{ - -} - -#endif /* __ASM_AVR32_DMA_MAPPING_H */ diff --git a/arch/avr32/include/asm/global_data.h b/arch/avr32/include/asm/global_data.h deleted file mode 100644 index 60abd00782..0000000000 --- a/arch/avr32/include/asm/global_data.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_GLOBAL_DATA_H__ -#define __ASM_GLOBAL_DATA_H__ - -/* Architecture-specific global data */ -struct arch_global_data { - unsigned long cpu_hz; /* cpu core clock frequency */ -}; - -#include <asm-generic/global_data.h> - -#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm("r5") - -#endif /* __ASM_GLOBAL_DATA_H__ */ diff --git a/arch/avr32/include/asm/hmatrix-common.h b/arch/avr32/include/asm/hmatrix-common.h deleted file mode 100644 index 66ea43a88b..0000000000 --- a/arch/avr32/include/asm/hmatrix-common.h +++ /dev/null @@ -1,115 +0,0 @@ -/* - * Copyright (C) 2008 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_AVR32_HMATRIX_COMMON_H__ -#define __ASM_AVR32_HMATRIX_COMMON_H__ - -/* HMATRIX register offsets */ -struct hmatrix_regs { - u32 MCFG[16]; - u32 SCFG[16]; - struct { - u32 A; - u32 B; - } PRS[16]; - u32 MRCR; - u32 __reserved[3]; - u32 SFR[16]; -}; - -/* Bitfields in MCFG */ -#define HMATRIX_ULBT_OFFSET 0 -#define HMATRIX_ULBT_SIZE 3 - -/* Bitfields in SCFG */ -#define HMATRIX_SLOT_CYCLE_OFFSET 0 -#define HMATRIX_SLOT_CYCLE_SIZE 8 -#define HMATRIX_DEFMSTR_TYPE_OFFSET 16 -#define HMATRIX_DEFMSTR_TYPE_SIZE 2 -#define HMATRIX_FIXED_DEFMSTR_OFFSET 18 -#define HMATRIX_FIXED_DEFMSTR_SIZE 4 -#define HMATRIX_ARBT_OFFSET 24 -#define HMATRIX_ARBT_SIZE 1 - -/* Bitfields in PRS.A */ -#define HMATRIX_M0PR_OFFSET 0 -#define HMATRIX_M0PR_SIZE 4 -#define HMATRIX_M1PR_OFFSET 4 -#define HMATRIX_M1PR_SIZE 4 -#define HMATRIX_M2PR_OFFSET 8 -#define HMATRIX_M2PR_SIZE 4 -#define HMATRIX_M3PR_OFFSET 12 -#define HMATRIX_M3PR_SIZE 4 -#define HMATRIX_M4PR_OFFSET 16 -#define HMATRIX_M4PR_SIZE 4 -#define HMATRIX_M5PR_OFFSET 20 -#define HMATRIX_M5PR_SIZE 4 -#define HMATRIX_M6PR_OFFSET 24 -#define HMATRIX_M6PR_SIZE 4 -#define HMATRIX_M7PR_OFFSET 28 -#define HMATRIX_M7PR_SIZE 4 - -/* Bitfields in PRS.B */ -#define HMATRIX_M8PR_OFFSET 0 -#define HMATRIX_M8PR_SIZE 4 -#define HMATRIX_M9PR_OFFSET 4 -#define HMATRIX_M9PR_SIZE 4 -#define HMATRIX_M10PR_OFFSET 8 -#define HMATRIX_M10PR_SIZE 4 -#define HMATRIX_M11PR_OFFSET 12 -#define HMATRIX_M11PR_SIZE 4 -#define HMATRIX_M12PR_OFFSET 16 -#define HMATRIX_M12PR_SIZE 4 -#define HMATRIX_M13PR_OFFSET 20 -#define HMATRIX_M13PR_SIZE 4 -#define HMATRIX_M14PR_OFFSET 24 -#define HMATRIX_M14PR_SIZE 4 -#define HMATRIX_M15PR_OFFSET 28 -#define HMATRIX_M15PR_SIZE 4 - -/* Constants for ULBT */ -#define HMATRIX_ULBT_INFINITE 0 -#define HMATRIX_ULBT_SINGLE 1 -#define HMATRIX_ULBT_FOUR_BEAT 2 -#define HMATRIX_ULBT_EIGHT_BEAT 3 -#define HMATRIX_ULBT_SIXTEEN_BEAT 4 - -/* Constants for DEFMSTR_TYPE */ -#define HMATRIX_DEFMSTR_TYPE_NO_DEFAULT 0 -#define HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT 1 -#define HMATRIX_DEFMSTR_TYPE_FIXED_DEFAULT 2 - -/* Constants for ARBT */ -#define HMATRIX_ARBT_ROUND_ROBIN 0 -#define HMATRIX_ARBT_FIXED_PRIORITY 1 - -/* Bit manipulation macros */ -#define HMATRIX_BIT(name) \ - (1 << HMATRIX_##name##_OFFSET) -#define HMATRIX_BF(name,value) \ - (((value) & ((1 << HMATRIX_##name##_SIZE) - 1)) \ - << HMATRIX_##name##_OFFSET) -#define HMATRIX_BFEXT(name,value) \ - (((value) >> HMATRIX_##name##_OFFSET) \ - & ((1 << HMATRIX_##name##_SIZE) - 1)) -#define HMATRIX_BFINS(name,value,old) \ - (((old) & ~(((1 << HMATRIX_##name##_SIZE) - 1) \ - << HMATRIX_##name##_OFFSET)) \ - | HMATRIX_BF(name,value)) - -/* Register access macros */ -#define __hmatrix_reg(reg) \ - (((volatile struct hmatrix_regs *)ATMEL_BASE_HMATRIX)->reg) -#define hmatrix_read(reg) \ - (__hmatrix_reg(reg)) -#define hmatrix_write(reg, value) \ - do { __hmatrix_reg(reg) = (value); } while (0) - -#define hmatrix_slave_read(slave, reg) \ - hmatrix_read(reg[HMATRIX_SLAVE_##slave]) -#define hmatrix_slave_write(slave, reg, value) \ - hmatrix_write(reg[HMATRIX_SLAVE_##slave], value) - -#endif /* __ASM_AVR32_HMATRIX_COMMON_H__ */ diff --git a/arch/avr32/include/asm/io.h b/arch/avr32/include/asm/io.h deleted file mode 100644 index c8d6933613..0000000000 --- a/arch/avr32/include/asm/io.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Copyright (C) 2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_AVR32_IO_H -#define __ASM_AVR32_IO_H - -#include <asm/types.h> - -#ifdef __KERNEL__ - -/* - * Generic IO read/write. These perform native-endian accesses. Note - * that some architectures will want to re-define __raw_{read,write}w. - */ -extern void __raw_writesb(unsigned int addr, const void *data, int bytelen); -extern void __raw_writesw(unsigned int addr, const void *data, int wordlen); -extern void __raw_writesl(unsigned int addr, const void *data, int longlen); - -extern void __raw_readsb(unsigned int addr, void *data, int bytelen); -extern void __raw_readsw(unsigned int addr, void *data, int wordlen); -extern void __raw_readsl(unsigned int addr, void *data, int longlen); - -#define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v)) -#define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v)) -#define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v)) - -#define __raw_readb(a) (*(volatile unsigned char *)(a)) -#define __raw_readw(a) (*(volatile unsigned short *)(a)) -#define __raw_readl(a) (*(volatile unsigned int *)(a)) - -/* As long as I/O is only performed in P4 (or possibly P3), we're safe */ -#define writeb(v,a) __raw_writeb(v,a) -#define writew(v,a) __raw_writew(v,a) -#define writel(v,a) __raw_writel(v,a) - -#define readb(a) __raw_readb(a) -#define readw(a) __raw_readw(a) -#define readl(a) __raw_readl(a) - -/* - * Bad read/write accesses... - */ -extern void __readwrite_bug(const char *fn); - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * All I/O is memory mapped, so these macros doesn't make very much sense - */ -#define outb(v,p) __raw_writeb(v, p) -#define outw(v,p) __raw_writew(cpu_to_le16(v),p) -#define outl(v,p) __raw_writel(cpu_to_le32(v),p) - -#define inb(p) ({ unsigned int __v = __raw_readb(p); __v; }) -#define inw(p) ({ unsigned int __v = __le16_to_cpu(__raw_readw(p)); __v; }) -#define inl(p) ({ unsigned int __v = __le32_to_cpu(__raw_readl(p)); __v; }) - -#include <asm/arch/addrspace.h> -/* Provides virt_to_phys, phys_to_virt, cached, uncached, map_physmem */ - -#endif /* __KERNEL__ */ - -static inline void sync(void) -{ -} - -/* - * Take down a mapping set up by map_physmem(). - */ -static inline void unmap_physmem(void *vaddr, unsigned long len) -{ - -} - -#endif /* __ASM_AVR32_IO_H */ diff --git a/arch/avr32/include/asm/linkage.h b/arch/avr32/include/asm/linkage.h deleted file mode 100644 index e69de29bb2..0000000000 --- a/arch/avr32/include/asm/linkage.h +++ /dev/null diff --git a/arch/avr32/include/asm/posix_types.h b/arch/avr32/include/asm/posix_types.h deleted file mode 100644 index c65f4ecb6b..0000000000 --- a/arch/avr32/include/asm/posix_types.h +++ /dev/null @@ -1,128 +0,0 @@ -/* - * Copyright (C) 2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_AVR32_POSIX_TYPES_H -#define __ASM_AVR32_POSIX_TYPES_H - -/* - * This file is generally used by user-level software, so you need to - * be a little careful about namespace pollution etc. Also, we cannot - * assume GCC is being used. - */ - -typedef unsigned long __kernel_dev_t; -typedef unsigned long __kernel_ino_t; -typedef unsigned short __kernel_mode_t; -typedef unsigned short __kernel_nlink_t; -typedef long __kernel_off_t; -typedef int __kernel_pid_t; -typedef unsigned short __kernel_ipc_pid_t; -typedef unsigned int __kernel_uid_t; -typedef unsigned int __kernel_gid_t; -typedef unsigned long __kernel_size_t; -typedef int __kernel_ssize_t; -typedef int __kernel_ptrdiff_t; -typedef long __kernel_time_t; -typedef long __kernel_suseconds_t; -typedef long __kernel_clock_t; -typedef int __kernel_timer_t; -typedef int __kernel_clockid_t; -typedef int __kernel_daddr_t; -typedef char * __kernel_caddr_t; -typedef unsigned short __kernel_uid16_t; -typedef unsigned short __kernel_gid16_t; -typedef unsigned int __kernel_uid32_t; -typedef unsigned int __kernel_gid32_t; - -typedef unsigned short __kernel_old_uid_t; -typedef unsigned short __kernel_old_gid_t; -typedef unsigned short __kernel_old_dev_t; - -#ifdef __GNUC__ -typedef long long __kernel_loff_t; -#endif - -typedef struct { -#if defined(__KERNEL__) || defined(__USE_ALL) - int val[2]; -#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */ - int __val[2]; -#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */ -} __kernel_fsid_t; - -#if defined(__KERNEL__) - -#undef __FD_SET -static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp) -{ - unsigned long __tmp = __fd / __NFDBITS; - unsigned long __rem = __fd % __NFDBITS; - __fdsetp->fds_bits[__tmp] |= (1UL<<__rem); -} - -#undef __FD_CLR -static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp) -{ - unsigned long __tmp = __fd / __NFDBITS; - unsigned long __rem = __fd % __NFDBITS; - __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem); -} - - -#undef __FD_ISSET -static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p) -{ - unsigned long __tmp = __fd / __NFDBITS; - unsigned long __rem = __fd % __NFDBITS; - return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0; -} - -/* - * This will unroll the loop for the normal constant case (8 ints, - * for a 256-bit fd_set) - */ -#undef __FD_ZERO -static __inline__ void __FD_ZERO(__kernel_fd_set *__p) -{ - unsigned long *__tmp = __p->fds_bits; - int __i; - - if (__builtin_constant_p(__FDSET_LONGS)) { - switch (__FDSET_LONGS) { - case 16: - __tmp[ 0] = 0; __tmp[ 1] = 0; - __tmp[ 2] = 0; __tmp[ 3] = 0; - __tmp[ 4] = 0; __tmp[ 5] = 0; - __tmp[ 6] = 0; __tmp[ 7] = 0; - __tmp[ 8] = 0; __tmp[ 9] = 0; - __tmp[10] = 0; __tmp[11] = 0; - __tmp[12] = 0; __tmp[13] = 0; - __tmp[14] = 0; __tmp[15] = 0; - return; - - case 8: - __tmp[ 0] = 0; __tmp[ 1] = 0; - __tmp[ 2] = 0; __tmp[ 3] = 0; - __tmp[ 4] = 0; __tmp[ 5] = 0; - __tmp[ 6] = 0; __tmp[ 7] = 0; - return; - - case 4: - __tmp[ 0] = 0; __tmp[ 1] = 0; - __tmp[ 2] = 0; __tmp[ 3] = 0; - return; - } - } - __i = __FDSET_LONGS; - while (__i) { - __i--; - *__tmp = 0; - __tmp++; - } -} - -#endif /* defined(__KERNEL__) */ - -#endif /* __ASM_AVR32_POSIX_TYPES_H */ diff --git a/arch/avr32/include/asm/processor.h b/arch/avr32/include/asm/processor.h deleted file mode 100644 index 74d868cdc8..0000000000 --- a/arch/avr32/include/asm/processor.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Copyright (C) 2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_AVR32_PROCESSOR_H -#define __ASM_AVR32_PROCESSOR_H - -#ifndef __ASSEMBLY__ - -#define current_text_addr() ({ void *pc; __asm__("mov %0,pc" : "=r"(pc)); pc; }) - -struct avr32_cpuinfo { - unsigned long loops_per_jiffy; -}; - -extern struct avr32_cpuinfo boot_cpu_data; - -#ifdef CONFIG_SMP -extern struct avr32_cpuinfo cpu_data[]; -#define current_cpu_data cpu_data[smp_processor_id()] -#else -#define cpu_data (&boot_cpu_data) -#define current_cpu_data boot_cpu_data -#endif - -/* TODO: Make configurable (2GB will serve as a reasonable default) */ -#define TASK_SIZE 0x80000000 - -/* This decides where the kernel will search for a free chunk of vm - * space during mmap's - */ -#define TASK_UNMAPPED_BASE (TASK_SIZE / 3) - -#define cpu_relax() barrier() -#define cpu_sync_pipeline() asm volatile("sub pc, -2" : : : "memory") - -/* This struct contains the CPU context as stored by switch_to() */ -struct thread_struct { - unsigned long pc; - unsigned long ksp; /* Kernel stack pointer */ - unsigned long r7; - unsigned long r6; - unsigned long r5; - unsigned long r4; - unsigned long r3; - unsigned long r2; - unsigned long r1; - unsigned long r0; -}; - -#define INIT_THREAD { \ - .ksp = sizeof(init_stack) + (long)&init_stack, \ -} - -/* - * Do necessary setup to start up a newly executed thread. - */ -#define start_thread(regs, new_pc, new_sp) \ - set_fs(USER_DS); \ - regs->sr = 0; /* User mode. */ \ - regs->gr[REG_PC] = new_pc; \ - regs->gr[REG_SP] = new_sp - -struct task_struct; - -/* Free all resources held by a thread */ -extern void release_thread(struct task_struct *); - -/* Create a kernel thread without removing it from tasklists */ -extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags); - -/* Prepare to copy thread state - unlazy all lazy status */ -#define prepare_to_copy(tsk) do { } while(0) - -/* Return saved PC of a blocked thread */ -#define thread_saved_pc(tsk) (tsk->thread.pc) - -#endif /* __ASSEMBLY__ */ - -#endif /* __ASM_AVR32_PROCESSOR_H */ diff --git a/arch/avr32/include/asm/ptrace.h b/arch/avr32/include/asm/ptrace.h deleted file mode 100644 index a32969b5a4..0000000000 --- a/arch/avr32/include/asm/ptrace.h +++ /dev/null @@ -1,132 +0,0 @@ -/* - * Copyright (C) 2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_AVR32_PTRACE_H -#define __ASM_AVR32_PTRACE_H - -/* - * Status Register bits - */ -#define SR_H 0x40000000 -#define SR_R 0x20000000 -#define SR_J 0x10000000 -#define SR_DM 0x08000000 -#define SR_D 0x04000000 -#define MODE_NMI 0x01c00000 -#define MODE_EXCEPTION 0x01800000 -#define MODE_INT3 0x01400000 -#define MODE_INT2 0x01000000 -#define MODE_INT1 0x00c00000 -#define MODE_INT0 0x00800000 -#define MODE_SUPERVISOR 0x00400000 -#define MODE_USER 0x00000000 -#define MODE_MASK 0x01c00000 -#define SR_EM 0x00200000 -#define SR_I3M 0x00100000 -#define SR_I2M 0x00080000 -#define SR_I1M 0x00040000 -#define SR_I0M 0x00020000 -#define SR_GM 0x00010000 - -#define MODE_SHIFT 22 -#define SR_EM_BIT 21 -#define SR_I3M_BIT 20 -#define SR_I2M_BIT 19 -#define SR_I1M_BIT 18 -#define SR_I0M_BIT 17 -#define SR_GM_BIT 16 - -/* The user-visible part */ -#define SR_Q 0x00000010 -#define SR_V 0x00000008 -#define SR_N 0x00000004 -#define SR_Z 0x00000002 -#define SR_C 0x00000001 - -/* - * The order is defined by the stdsp instruction. r0 is stored first, so it - * gets the highest address. - * - * Registers 0-12 are general-purpose registers (r12 is normally used for - * the function return value). - * Register 13 is the stack pointer - * Register 14 is the link register - * Register 15 is the program counter - */ -#define FRAME_SIZE_FULL 72 -#define REG_R12_ORIG 68 -#define REG_R0 64 -#define REG_R1 60 -#define REG_R2 56 -#define REG_R3 52 -#define REG_R4 48 -#define REG_R5 44 -#define REG_R6 40 -#define REG_R7 36 -#define REG_R8 32 -#define REG_R9 28 -#define REG_R10 34 -#define REG_R11 20 -#define REG_R12 16 -#define REG_SP 12 -#define REG_LR 8 - -#define FRAME_SIZE_MIN 8 -#define REG_PC 4 -#define REG_SR 0 - -#ifndef __ASSEMBLY__ -struct pt_regs { - /* These are always saved */ - unsigned long sr; - unsigned long pc; - - /* These are sometimes saved */ - unsigned long lr; - unsigned long sp; - unsigned long r12; - unsigned long r11; - unsigned long r10; - unsigned long r9; - unsigned long r8; - unsigned long r7; - unsigned long r6; - unsigned long r5; - unsigned long r4; - unsigned long r3; - unsigned long r2; - unsigned long r1; - unsigned long r0; - - /* Only saved on system call */ - unsigned long r12_orig; -}; - -#ifdef __KERNEL__ -# define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER) -# define instruction_pointer(regs) ((regs)->pc) -extern void show_regs (struct pt_regs *); - -static __inline__ int valid_user_regs(struct pt_regs *regs) -{ - /* - * Some of the Java bits might be acceptable if/when we - * implement some support for that stuff... - */ - if ((regs->sr & 0xffff0000) == 0) - return 1; - - /* - * Force status register flags to be sane and report this - * illegal behaviour... - */ - regs->sr &= 0x0000ffff; - return 0; -} -#endif - -#endif /* ! __ASSEMBLY__ */ - -#endif /* __ASM_AVR32_PTRACE_H */ diff --git a/arch/avr32/include/asm/sdram.h b/arch/avr32/include/asm/sdram.h deleted file mode 100644 index 83d515bda2..0000000000 --- a/arch/avr32/include/asm/sdram.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (C) 2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_AVR32_SDRAM_H -#define __ASM_AVR32_SDRAM_H - -struct sdram_config { - /* Number of data bits. */ - enum { - SDRAM_DATA_16BIT = 16, - SDRAM_DATA_32BIT = 32, - } data_bits; - - /* Number of address bits */ - uint8_t row_bits, col_bits, bank_bits; - - /* SDRAM timings in cycles */ - uint8_t cas, twr, trc, trp, trcd, tras, txsr; - - /* SDRAM refresh period in cycles */ - unsigned long refresh_period; -}; - -/* - * Attempt to initialize the SDRAM controller using the specified - * parameters. Return the expected size of the memory area based on - * the number of address and data bits. - * - * The caller should verify that the configuration is correct by - * running a memory test, e.g. get_ram_size(). - */ -extern unsigned long sdram_init(void *sdram_base, - const struct sdram_config *config); - -#endif /* __ASM_AVR32_SDRAM_H */ diff --git a/arch/avr32/include/asm/sections.h b/arch/avr32/include/asm/sections.h deleted file mode 100644 index 6b7804fe02..0000000000 --- a/arch/avr32/include/asm/sections.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Copyright (C) 2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_AVR32_SECTIONS_H -#define __ASM_AVR32_SECTIONS_H - -#include <asm-generic/sections.h> - -/* References to section boundaries */ - -extern char __data_lma[], __edata_lma[]; -extern char __got_start[], __got_lma[], __got_end[]; - -#endif /* __ASM_AVR32_SECTIONS_H */ diff --git a/arch/avr32/include/asm/setup.h b/arch/avr32/include/asm/setup.h deleted file mode 100644 index e05e65ebc5..0000000000 --- a/arch/avr32/include/asm/setup.h +++ /dev/null @@ -1,134 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * Based on linux/include/asm-arm/setup.h - * Copyright (C) 1997-1999 Russel King - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_AVR32_SETUP_H__ -#define __ASM_AVR32_SETUP_H__ - -#define COMMAND_LINE_SIZE 256 - -/* Magic number indicating that a tag table is present */ -#define ATAG_MAGIC 0xa2a25441 - -#ifndef __ASSEMBLY__ - -/* - * Generic memory range, used by several tags. - * - * addr is always physical. - * size is measured in bytes. - * next is for use by the OS, e.g. for grouping regions into - * linked lists. - */ -struct tag_mem_range { - u32 addr; - u32 size; - struct tag_mem_range * next; -}; - -/* The list ends with an ATAG_NONE node. */ -#define ATAG_NONE 0x00000000 - -struct tag_header { - u32 size; - u32 tag; -}; - -/* The list must start with an ATAG_CORE node */ -#define ATAG_CORE 0x54410001 - -struct tag_core { - u32 flags; - u32 pagesize; - u32 rootdev; -}; - -/* it is allowed to have multiple ATAG_MEM nodes */ -#define ATAG_MEM 0x54410002 -/* ATAG_MEM uses tag_mem_range */ - -/* command line: \0 terminated string */ -#define ATAG_CMDLINE 0x54410003 - -struct tag_cmdline { - char cmdline[1]; /* this is the minimum size */ -}; - -/* Ramdisk image (may be compressed) */ -#define ATAG_RDIMG 0x54410004 -/* ATAG_RDIMG uses tag_mem_range */ - -/* Information about various clocks present in the system */ -#define ATAG_CLOCK 0x54410005 - -struct tag_clock { - u32 clock_id; /* Which clock are we talking about? */ - u32 clock_flags; /* Special features */ - u64 clock_hz; /* Clock speed in Hz */ -}; - -/* The clock types we know about */ -#define ACLOCK_BOOTCPU 0 /* The CPU we're booting from */ -#define ACLOCK_HSB 1 /* Deprecated */ - -/* Memory reserved for the system (e.g. the bootloader) */ -#define ATAG_RSVD_MEM 0x54410006 -/* ATAG_RSVD_MEM uses tag_mem_range */ - -/* Ethernet information */ - -#define ATAG_ETHERNET 0x54410007 - -struct tag_ethernet { - u8 mac_index; - u8 mii_phy_addr; - u8 hw_address[6]; -}; - -#define AETH_INVALID_PHY 0xff - -/* board information information */ -#define ATAG_BOARDINFO 0x54410008 - -struct tag_boardinfo { - u32 board_number; -}; - -struct tag { - struct tag_header hdr; - union { - struct tag_core core; - struct tag_mem_range mem_range; - struct tag_cmdline cmdline; - struct tag_clock clock; - struct tag_ethernet ethernet; - struct tag_boardinfo boardinfo; - } u; -}; - -struct tagtable { - u32 tag; - int (*parse)(struct tag *); -}; - -#define __tag __attribute_used__ __attribute__((__section__(".taglist"))) -#define __tagtable(tag, fn) \ - static struct tagtable __tagtable_##fn __tag = { tag, fn } - -#define tag_member_present(tag,member) \ - ((unsigned long)(&((struct tag *)0L)->member + 1) \ - <= (tag)->hdr.size * 4) - -#define tag_next(t) ((struct tag *)((u32 *)(t) + (t)->hdr.size)) -#define tag_size(type) ((sizeof(struct tag_header) + sizeof(struct type)) >> 2) - -#define for_each_tag(t,base) \ - for (t = base; t->hdr.size; t = tag_next(t)) - -#endif /* !__ASSEMBLY__ */ - -#endif /* __ASM_AVR32_SETUP_H__ */ diff --git a/arch/avr32/include/asm/string.h b/arch/avr32/include/asm/string.h deleted file mode 100644 index dba0219fb3..0000000000 --- a/arch/avr32/include/asm/string.h +++ /dev/null @@ -1,12 +0,0 @@ -/* - * Copyright (C) 2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_AVR32_STRING_H -#define __ASM_AVR32_STRING_H - -#define __HAVE_ARCH_MEMSET -extern void *memset(void *s, int c, __kernel_size_t n); - -#endif /* __ASM_AVR32_STRING_H */ diff --git a/arch/avr32/include/asm/sysreg.h b/arch/avr32/include/asm/sysreg.h deleted file mode 100644 index 4f6970448b..0000000000 --- a/arch/avr32/include/asm/sysreg.h +++ /dev/null @@ -1,281 +0,0 @@ -/* - * System registers for AVR32 - */ -#ifndef __ASM_AVR32_SYSREG_H__ -#define __ASM_AVR32_SYSREG_H__ - -/* system register offsets */ -#define SYSREG_SR 0x0000 -#define SYSREG_EVBA 0x0004 -#define SYSREG_ACBA 0x0008 -#define SYSREG_CPUCR 0x000c -#define SYSREG_ECR 0x0010 -#define SYSREG_RSR_SUP 0x0014 -#define SYSREG_RSR_INT0 0x0018 -#define SYSREG_RSR_INT1 0x001c -#define SYSREG_RSR_INT2 0x0020 -#define SYSREG_RSR_INT3 0x0024 -#define SYSREG_RSR_EX 0x0028 -#define SYSREG_RSR_NMI 0x002c -#define SYSREG_RSR_DBG 0x0030 -#define SYSREG_RAR_SUP 0x0034 -#define SYSREG_RAR_INT0 0x0038 -#define SYSREG_RAR_INT1 0x003c -#define SYSREG_RAR_INT2 0x0040 -#define SYSREG_RAR_INT3 0x0044 -#define SYSREG_RAR_EX 0x0048 -#define SYSREG_RAR_NMI 0x004c -#define SYSREG_RAR_DBG 0x0050 -#define SYSREG_JECR 0x0054 -#define SYSREG_JOSP 0x0058 -#define SYSREG_JAVA_LV0 0x005c -#define SYSREG_JAVA_LV1 0x0060 -#define SYSREG_JAVA_LV2 0x0064 -#define SYSREG_JAVA_LV3 0x0068 -#define SYSREG_JAVA_LV4 0x006c -#define SYSREG_JAVA_LV5 0x0070 -#define SYSREG_JAVA_LV6 0x0074 -#define SYSREG_JAVA_LV7 0x0078 -#define SYSREG_JTBA 0x007c -#define SYSREG_JBCR 0x0080 -#define SYSREG_CONFIG0 0x0100 -#define SYSREG_CONFIG1 0x0104 -#define SYSREG_COUNT 0x0108 -#define SYSREG_COMPARE 0x010c -#define SYSREG_TLBEHI 0x0110 -#define SYSREG_TLBELO 0x0114 -#define SYSREG_PTBR 0x0118 -#define SYSREG_TLBEAR 0x011c -#define SYSREG_MMUCR 0x0120 -#define SYSREG_TLBARLO 0x0124 -#define SYSREG_TLBARHI 0x0128 -#define SYSREG_PCCNT 0x012c -#define SYSREG_PCNT0 0x0130 -#define SYSREG_PCNT1 0x0134 -#define SYSREG_PCCR 0x0138 -#define SYSREG_BEAR 0x013c -#define SYSREG_SABAL 0x0300 -#define SYSREG_SABAH 0x0304 -#define SYSREG_SABD 0x0308 - -/* Bitfields in SR */ -#define SYSREG_SR_C_OFFSET 0 -#define SYSREG_SR_C_SIZE 1 -#define SYSREG_Z_OFFSET 1 -#define SYSREG_Z_SIZE 1 -#define SYSREG_SR_N_OFFSET 2 -#define SYSREG_SR_N_SIZE 1 -#define SYSREG_SR_V_OFFSET 3 -#define SYSREG_SR_V_SIZE 1 -#define SYSREG_Q_OFFSET 4 -#define SYSREG_Q_SIZE 1 -#define SYSREG_L_OFFSET 5 -#define SYSREG_L_SIZE 1 -#define SYSREG_T_OFFSET 14 -#define SYSREG_T_SIZE 1 -#define SYSREG_SR_R_OFFSET 15 -#define SYSREG_SR_R_SIZE 1 -#define SYSREG_GM_OFFSET 16 -#define SYSREG_GM_SIZE 1 -#define SYSREG_I0M_OFFSET 17 -#define SYSREG_I0M_SIZE 1 -#define SYSREG_I1M_OFFSET 18 -#define SYSREG_I1M_SIZE 1 -#define SYSREG_I2M_OFFSET 19 -#define SYSREG_I2M_SIZE 1 -#define SYSREG_I3M_OFFSET 20 -#define SYSREG_I3M_SIZE 1 -#define SYSREG_EM_OFFSET 21 -#define SYSREG_EM_SIZE 1 -#define SYSREG_M0_OFFSET 22 -#define SYSREG_M0_SIZE 1 -#define SYSREG_M1_OFFSET 23 -#define SYSREG_M1_SIZE 1 -#define SYSREG_M2_OFFSET 24 -#define SYSREG_M2_SIZE 1 -#define SYSREG_SR_D_OFFSET 26 -#define SYSREG_SR_D_SIZE 1 -#define SYSREG_DM_OFFSET 27 -#define SYSREG_DM_SIZE 1 -#define SYSREG_SR_J_OFFSET 28 -#define SYSREG_SR_J_SIZE 1 -#define SYSREG_H_OFFSET 29 -#define SYSREG_H_SIZE 1 - -/* Bitfields in CPUCR */ -#define SYSREG_BI_OFFSET 0 -#define SYSREG_BI_SIZE 1 -#define SYSREG_BE_OFFSET 1 -#define SYSREG_BE_SIZE 1 -#define SYSREG_FE_OFFSET 2 -#define SYSREG_FE_SIZE 1 -#define SYSREG_RE_OFFSET 3 -#define SYSREG_RE_SIZE 1 -#define SYSREG_IBE_OFFSET 4 -#define SYSREG_IBE_SIZE 1 -#define SYSREG_IEE_OFFSET 5 -#define SYSREG_IEE_SIZE 1 - -/* Bitfields in ECR */ -#define SYSREG_ECR_OFFSET 0 -#define SYSREG_ECR_SIZE 32 - -/* Bitfields in CONFIG0 */ -#define SYSREG_CONFIG0_R_OFFSET 0 -#define SYSREG_CONFIG0_R_SIZE 1 -#define SYSREG_CONFIG0_D_OFFSET 1 -#define SYSREG_CONFIG0_D_SIZE 1 -#define SYSREG_CONFIG0_S_OFFSET 2 -#define SYSREG_CONFIG0_S_SIZE 1 -#define SYSREG_O_OFFSET 3 -#define SYSREG_O_SIZE 1 -#define SYSREG_P_OFFSET 4 -#define SYSREG_P_SIZE 1 -#define SYSREG_CONFIG0_J_OFFSET 5 -#define SYSREG_CONFIG0_J_SIZE 1 -#define SYSREG_F_OFFSET 6 -#define SYSREG_F_SIZE 1 -#define SYSREG_MMUT_OFFSET 7 -#define SYSREG_MMUT_SIZE 3 -#define SYSREG_AR_OFFSET 10 -#define SYSREG_AR_SIZE 3 -#define SYSREG_AT_OFFSET 13 -#define SYSREG_AT_SIZE 3 -#define SYSREG_PROCESSORREVISION_OFFSET 16 -#define SYSREG_PROCESSORREVISION_SIZE 8 -#define SYSREG_PROCESSORID_OFFSET 24 -#define SYSREG_PROCESSORID_SIZE 8 - -/* Bitfields in CONFIG1 */ -#define SYSREG_DASS_OFFSET 0 -#define SYSREG_DASS_SIZE 3 -#define SYSREG_DLSZ_OFFSET 3 -#define SYSREG_DLSZ_SIZE 3 -#define SYSREG_DSET_OFFSET 6 -#define SYSREG_DSET_SIZE 4 -#define SYSREG_IASS_OFFSET 10 -#define SYSREG_IASS_SIZE 3 -#define SYSREG_ILSZ_OFFSET 13 -#define SYSREG_ILSZ_SIZE 3 -#define SYSREG_ISET_OFFSET 16 -#define SYSREG_ISET_SIZE 4 -#define SYSREG_DMMUSZ_OFFSET 20 -#define SYSREG_DMMUSZ_SIZE 6 -#define SYSREG_IMMUSZ_OFFSET 26 -#define SYSREG_IMMUSZ_SIZE 6 - -/* Bitfields in TLBEHI */ -#define SYSREG_ASID_OFFSET 0 -#define SYSREG_ASID_SIZE 8 -#define SYSREG_TLBEHI_I_OFFSET 8 -#define SYSREG_TLBEHI_I_SIZE 1 -#define SYSREG_TLBEHI_V_OFFSET 9 -#define SYSREG_TLBEHI_V_SIZE 1 -#define SYSREG_VPN_OFFSET 10 -#define SYSREG_VPN_SIZE 22 - -/* Bitfields in TLBELO */ -#define SYSREG_W_OFFSET 0 -#define SYSREG_W_SIZE 1 -#define SYSREG_TLBELO_D_OFFSET 1 -#define SYSREG_TLBELO_D_SIZE 1 -#define SYSREG_SZ_OFFSET 2 -#define SYSREG_SZ_SIZE 2 -#define SYSREG_AP_OFFSET 4 -#define SYSREG_AP_SIZE 3 -#define SYSREG_B_OFFSET 7 -#define SYSREG_B_SIZE 1 -#define SYSREG_G_OFFSET 8 -#define SYSREG_G_SIZE 1 -#define SYSREG_TLBELO_C_OFFSET 9 -#define SYSREG_TLBELO_C_SIZE 1 -#define SYSREG_PFN_OFFSET 10 -#define SYSREG_PFN_SIZE 22 - -/* Bitfields in MMUCR */ -#define SYSREG_E_OFFSET 0 -#define SYSREG_E_SIZE 1 -#define SYSREG_M_OFFSET 1 -#define SYSREG_M_SIZE 1 -#define SYSREG_MMUCR_I_OFFSET 2 -#define SYSREG_MMUCR_I_SIZE 1 -#define SYSREG_MMUCR_N_OFFSET 3 -#define SYSREG_MMUCR_N_SIZE 1 -#define SYSREG_MMUCR_S_OFFSET 4 -#define SYSREG_MMUCR_S_SIZE 1 -#define SYSREG_DLA_OFFSET 8 -#define SYSREG_DLA_SIZE 6 -#define SYSREG_DRP_OFFSET 14 -#define SYSREG_DRP_SIZE 6 -#define SYSREG_ILA_OFFSET 20 -#define SYSREG_ILA_SIZE 6 -#define SYSREG_IRP_OFFSET 26 -#define SYSREG_IRP_SIZE 6 - -/* Bitfields in PCCR */ -#define SYSREG_PCCR_R_OFFSET 1 -#define SYSREG_PCCR_R_SIZE 1 -#define SYSREG_PCCR_C_OFFSET 2 -#define SYSREG_PCCR_C_SIZE 1 -#define SYSREG_PCCR_S_OFFSET 3 -#define SYSREG_PCCR_S_SIZE 1 -#define SYSREG_IEC_OFFSET 4 -#define SYSREG_IEC_SIZE 1 -#define SYSREG_IE0_OFFSET 5 -#define SYSREG_IE0_SIZE 1 -#define SYSREG_IE1_OFFSET 6 -#define SYSREG_IE1_SIZE 1 -#define SYSREG_FC_OFFSET 8 -#define SYSREG_FC_SIZE 1 -#define SYSREG_F0_OFFSET 9 -#define SYSREG_F0_SIZE 1 -#define SYSREG_F1_OFFSET 10 -#define SYSREG_F1_SIZE 1 -#define SYSREG_CONF0_OFFSET 12 -#define SYSREG_CONF0_SIZE 6 -#define SYSREG_CONF1_OFFSET 18 -#define SYSREG_CONF1_SIZE 6 - -/* Constants for ECR */ -#define ECR_UNRECOVERABLE 0 -#define ECR_TLB_MULTIPLE 1 -#define ECR_BUS_ERROR_WRITE 2 -#define ECR_BUS_ERROR_READ 3 -#define ECR_NMI 4 -#define ECR_ADDR_ALIGN_X 5 -#define ECR_PROTECTION_X 6 -#define ECR_DEBUG 7 -#define ECR_ILLEGAL_OPCODE 8 -#define ECR_UNIMPL_INSTRUCTION 9 -#define ECR_PRIVILEGE_VIOLATION 10 -#define ECR_FPE 11 -#define ECR_COPROC_ABSENT 12 -#define ECR_ADDR_ALIGN_R 13 -#define ECR_ADDR_ALIGN_W 14 -#define ECR_PROTECTION_R 15 -#define ECR_PROTECTION_W 16 -#define ECR_DTLB_MODIFIED 17 -#define ECR_TLB_MISS_X 20 -#define ECR_TLB_MISS_R 24 -#define ECR_TLB_MISS_W 28 - -/* Bit manipulation macros */ -#define SYSREG_BIT(name) (1 << SYSREG_##name##_OFFSET) -#define SYSREG_BF(name,value) \ - (((value) & ((1 << SYSREG_##name##_SIZE) - 1)) \ - << SYSREG_##name##_OFFSET) -#define SYSREG_BFEXT(name,value) \ - (((value) >> SYSREG_##name##_OFFSET) \ - & ((1 << SYSREG_##name##_SIZE) - 1)) -#define SYSREG_BFINS(name,value,old) \ - (((old) & ~(((1 << SYSREG_##name##_SIZE) - 1) \ - << SYSREG_##name##_OFFSET)) \ - | SYSREG_BF(name,value)) - -/* Register access macros */ -#define sysreg_read(reg) \ - ((unsigned long)__builtin_mfsr(SYSREG_##reg)) -#define sysreg_write(reg, value) \ - __builtin_mtsr(SYSREG_##reg, value) - -#endif /* __ASM_AVR32_SYSREG_H__ */ diff --git a/arch/avr32/include/asm/types.h b/arch/avr32/include/asm/types.h deleted file mode 100644 index 65de677ece..0000000000 --- a/arch/avr32/include/asm/types.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * Copyright (C) 2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_AVR32_TYPES_H -#define __ASM_AVR32_TYPES_H - -#ifndef __ASSEMBLY__ - -typedef unsigned short umode_t; - -/* - * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the - * header files exported to user space - */ -typedef __signed__ char __s8; -typedef unsigned char __u8; - -typedef __signed__ short __s16; -typedef unsigned short __u16; - -typedef __signed__ int __s32; -typedef unsigned int __u32; - -#if defined(__GNUC__) -__extension__ typedef __signed__ long long __s64; -__extension__ typedef unsigned long long __u64; -#endif - -#endif /* __ASSEMBLY__ */ - -/* - * These aren't exported outside the kernel to avoid name space clashes - */ -#ifdef __KERNEL__ - -#define BITS_PER_LONG 32 - -#ifndef __ASSEMBLY__ - -typedef __signed__ char s8; -typedef unsigned char u8; - -typedef __signed__ short s16; -typedef unsigned short u16; - -typedef __signed__ int s32; -typedef unsigned int u32; - -typedef __signed__ long long s64; -typedef unsigned long long u64; - -/* Dma addresses are 32-bits wide. */ - -typedef u32 dma_addr_t; - -typedef unsigned long phys_addr_t; -typedef unsigned long phys_size_t; - -#ifdef CONFIG_LBD -typedef u64 sector_t; -#define HAVE_SECTOR_T -#endif - -#endif /* __ASSEMBLY__ */ - -#endif /* __KERNEL__ */ - - -#endif /* __ASM_AVR32_TYPES_H */ diff --git a/arch/avr32/include/asm/u-boot.h b/arch/avr32/include/asm/u-boot.h deleted file mode 100644 index 7d48e9a46b..0000000000 --- a/arch/avr32/include/asm/u-boot.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_U_BOOT_H__ -#define __ASM_U_BOOT_H__ 1 - -/* Use the generic board which requires a unified bd_info */ -#include <asm-generic/u-boot.h> - -/* For image.h:image_check_target_arch() */ -#define IH_ARCH_DEFAULT IH_ARCH_AVR32 - -int arch_cpu_init(void); -int dram_init(void); - -#endif /* __ASM_U_BOOT_H__ */ diff --git a/arch/avr32/include/asm/unaligned.h b/arch/avr32/include/asm/unaligned.h deleted file mode 100644 index 6cecbbb211..0000000000 --- a/arch/avr32/include/asm/unaligned.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/unaligned.h> |