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Diffstat (limited to 'arch/m68k/cpu/mcf5445x/speed.c')
-rw-r--r--arch/m68k/cpu/mcf5445x/speed.c71
1 files changed, 37 insertions, 34 deletions
diff --git a/arch/m68k/cpu/mcf5445x/speed.c b/arch/m68k/cpu/mcf5445x/speed.c
index 9c0c07733b..073b7efafb 100644
--- a/arch/m68k/cpu/mcf5445x/speed.c
+++ b/arch/m68k/cpu/mcf5445x/speed.c
@@ -1,6 +1,6 @@
/*
*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
*
* See file CREDITS for list of people who contributed to this
@@ -26,6 +26,7 @@
#include <asm/processor.h>
#include <asm/immap.h>
+#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -44,7 +45,7 @@ DECLARE_GLOBAL_DATA_PTR;
void clock_enter_limp(int lpdiv)
{
- volatile ccm_t *ccm = (volatile ccm_t *)MMAP_CCM;
+ ccm_t *ccm = (ccm_t *)MMAP_CCM;
int i, j;
/* Check bounds of divider */
@@ -57,10 +58,10 @@ void clock_enter_limp(int lpdiv)
for (i = 0, j = lpdiv; j != 1; j >>= 1, i++) ;
/* Apply the divider to the system clock */
- ccm->cdr = (ccm->cdr & 0xF0FF) | CCM_CDR_LPDIV(i);
+ clrsetbits_be16(&ccm->cdr, 0x0f00, CCM_CDR_LPDIV(i));
/* Enable Limp Mode */
- ccm->misccr |= CCM_MISCCR_LIMP;
+ setbits_be16(&ccm->misccr, CCM_MISCCR_LIMP);
}
/*
@@ -69,14 +70,15 @@ void clock_enter_limp(int lpdiv)
*/
void clock_exit_limp(void)
{
- volatile ccm_t *ccm = (volatile ccm_t *)MMAP_CCM;
- volatile pll_t *pll = (volatile pll_t *)MMAP_PLL;
+ ccm_t *ccm = (ccm_t *)MMAP_CCM;
+ pll_t *pll = (pll_t *)MMAP_PLL;
/* Exit Limp mode */
- ccm->misccr &= ~CCM_MISCCR_LIMP;
+ clrbits_be16(&ccm->misccr, CCM_MISCCR_LIMP);
/* Wait for the PLL to lock */
- while (!(pll->psr & PLL_PSR_LOCK)) ;
+ while (!(in_be32(&pll->psr) & PLL_PSR_LOCK))
+ ;
}
/*
@@ -85,8 +87,8 @@ void clock_exit_limp(void)
int get_clocks(void)
{
- volatile ccm_t *ccm = (volatile ccm_t *)MMAP_CCM;
- volatile pll_t *pll = (volatile pll_t *)MMAP_PLL;
+ ccm_t *ccm = (ccm_t *)MMAP_CCM;
+ pll_t *pll = (pll_t *)MMAP_PLL;
int pllmult_nopci[] = { 20, 10, 24, 18, 12, 6, 16, 8 };
int pllmult_pci[] = { 12, 6, 16, 8 };
int vco = 0, bPci, temp, fbtemp, pcrvalue;
@@ -94,13 +96,13 @@ int get_clocks(void)
u16 fbpll_mask;
#ifdef CONFIG_M54455EVB
- volatile u8 *cpld = (volatile u8 *)(CONFIG_SYS_CS2_BASE + 3);
+ u8 *cpld = (u8 *)(CONFIG_SYS_CS2_BASE + 3);
#endif
u8 bootmode;
/* To determine PCI is present or not */
- if (((ccm->ccr & CCM_CCR_360_FBCONFIG_MASK) == 0x00e0) ||
- ((ccm->ccr & CCM_CCR_360_FBCONFIG_MASK) == 0x0060)) {
+ if (((in_be16(&ccm->ccr) & CCM_CCR_360_FBCONFIG_MASK) == 0x00e0) ||
+ ((in_be16(&ccm->ccr) & CCM_CCR_360_FBCONFIG_MASK) == 0x0060)) {
pPllmult = &pllmult_pci[0];
fbpll_mask = 3; /* 11b */
bPci = 1;
@@ -114,7 +116,7 @@ int get_clocks(void)
}
#ifdef CONFIG_M54455EVB
- bootmode = (*cpld & 0x03);
+ bootmode = (in_8(cpld) & 0x03);
if (bootmode != 3) {
/* Temporary read from CCR- fixed fb issue, must be the same clock
@@ -122,11 +124,11 @@ int get_clocks(void)
fbtemp = pPllmult[ccm->ccr & fbpll_mask];
/* Break down into small pieces, code still in flex bus */
- pcrvalue = pll->pcr & 0xFFFFF0FF;
+ pcrvalue = in_be32(&pll->pcr) & 0xFFFFF0FF;
temp = fbtemp - 1;
pcrvalue |= PLL_PCR_OUTDIV3(temp);
- pll->pcr = pcrvalue;
+ out_be32(&pll->pcr, pcrvalue);
}
#endif
#ifdef CONFIG_M54451EVB
@@ -137,9 +139,10 @@ int get_clocks(void)
bootmode = 2;
/* default value is 16 mul, set to 20 mul */
- pcrvalue = (pll->pcr & 0x00FFFFFF) | 0x14000000;
- pll->pcr = pcrvalue;
- while ((pll->psr & PLL_PSR_LOCK) != PLL_PSR_LOCK);
+ pcrvalue = (in_be32(&pll->pcr) & 0x00FFFFFF) | 0x14000000;
+ out_be32(&pll->pcr, pcrvalue);
+ while ((in_be32(&pll->psr) & PLL_PSR_LOCK) != PLL_PSR_LOCK)
+ ;
#endif
#endif
@@ -149,10 +152,10 @@ int get_clocks(void)
if ((vco < CLOCK_PLL_FVCO_MIN) || (vco > CLOCK_PLL_FVCO_MAX)) {
/* invaild range, re-set in PCR */
- int temp = ((pll->pcr & PLL_PCR_OUTDIV2_MASK) >> 4) + 1;
+ int temp = ((in_be32(&pll->pcr) & PLL_PCR_OUTDIV2_MASK) >> 4) + 1;
int i, j, bus;
- j = (pll->pcr & 0xFF000000) >> 24;
+ j = (in_be32(&pll->pcr) & 0xFF000000) >> 24;
for (i = j; i < 0xFF; i++) {
vco = i * CONFIG_SYS_INPUT_CLKSRC;
if (vco >= CLOCK_PLL_FVCO_MIN) {
@@ -163,47 +166,47 @@ int get_clocks(void)
break;
}
}
- pcrvalue = pll->pcr & 0x00FF00FF;
+ pcrvalue = in_be32(&pll->pcr) & 0x00FF00FF;
fbtemp = ((i - 1) << 8) | ((i - 1) << 12);
pcrvalue |= ((i << 24) | fbtemp);
- pll->pcr = pcrvalue;
+ out_be32(&pll->pcr, pcrvalue);
}
gd->vco_clk = vco; /* Vco clock */
} else if (bootmode == 2) {
/* Normal mode */
- vco = ((pll->pcr & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC;
+ vco = ((in_be32(&pll->pcr) & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC;
if ((vco < CLOCK_PLL_FVCO_MIN) || (vco > CLOCK_PLL_FVCO_MAX)) {
/* Default value */
- pcrvalue = (pll->pcr & 0x00FFFFFF);
- pcrvalue |= pPllmult[ccm->ccr & fbpll_mask] << 24;
- pll->pcr = pcrvalue;
- vco = ((pll->pcr & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC;
+ pcrvalue = (in_be32(&pll->pcr) & 0x00FFFFFF);
+ pcrvalue |= pPllmult[in_be16(&ccm->ccr) & fbpll_mask] << 24;
+ out_be32(&pll->pcr, pcrvalue);
+ vco = ((in_be32(&pll->pcr) & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC;
}
gd->vco_clk = vco; /* Vco clock */
} else if (bootmode == 3) {
/* serial mode */
- vco = ((pll->pcr & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC;
+ vco = ((in_be32(&pll->pcr) & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC;
gd->vco_clk = vco; /* Vco clock */
}
- if ((ccm->ccr & CCM_MISCCR_LIMP) == CCM_MISCCR_LIMP) {
+ if ((in_be16(&ccm->ccr) & CCM_MISCCR_LIMP) == CCM_MISCCR_LIMP) {
/* Limp mode */
} else {
gd->inp_clk = CONFIG_SYS_INPUT_CLKSRC; /* Input clock */
- temp = (pll->pcr & PLL_PCR_OUTDIV1_MASK) + 1;
+ temp = (in_be32(&pll->pcr) & PLL_PCR_OUTDIV1_MASK) + 1;
gd->cpu_clk = vco / temp; /* cpu clock */
- temp = ((pll->pcr & PLL_PCR_OUTDIV2_MASK) >> 4) + 1;
+ temp = ((in_be32(&pll->pcr) & PLL_PCR_OUTDIV2_MASK) >> 4) + 1;
gd->bus_clk = vco / temp; /* bus clock */
- temp = ((pll->pcr & PLL_PCR_OUTDIV3_MASK) >> 8) + 1;
+ temp = ((in_be32(&pll->pcr) & PLL_PCR_OUTDIV3_MASK) >> 8) + 1;
gd->flb_clk = vco / temp; /* FlexBus clock */
#ifdef CONFIG_PCI
if (bPci) {
- temp = ((pll->pcr & PLL_PCR_OUTDIV4_MASK) >> 12) + 1;
+ temp = ((in_be32(&pll->pcr) & PLL_PCR_OUTDIV4_MASK) >> 12) + 1;
gd->pci_clk = vco / temp; /* PCI clock */
}
#endif
generated by cgit (git 2.34.1) at 2024-12-24 14:11:43 +0000