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Diffstat (limited to 'arch/mips/cpu/mips32/cache.S')
| -rw-r--r-- | arch/mips/cpu/mips32/cache.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S index 40bb46e5b6..fc13d3faab 100644 --- a/arch/mips/cpu/mips32/cache.S +++ b/arch/mips/cpu/mips32/cache.S @@ -18,7 +18,7 @@ #define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT #endif -#define RA t8 +#define RA t9 /* * 16kB is the maximum size of instruction and data caches on MIPS 4K, |