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-rw-r--r--arch/mips/cpu/mips32/config.mk6
-rw-r--r--arch/mips/cpu/mips32/start.S288
2 files changed, 96 insertions, 198 deletions
diff --git a/arch/mips/cpu/mips32/config.mk b/arch/mips/cpu/mips32/config.mk
index 481e9844db..7399701fe9 100644
--- a/arch/mips/cpu/mips32/config.mk
+++ b/arch/mips/cpu/mips32/config.mk
@@ -30,5 +30,11 @@
MIPSFLAGS := -march=mips32r2
PLATFORM_CPPFLAGS += $(MIPSFLAGS)
+PLATFORM_CPPFLAGS += -mabi=32 -DCONFIG_32BIT
+ifdef CONFIG_SYS_BIG_ENDIAN
+PLATFORM_LDFLAGS += -m elf32btsmip
+else
+PLATFORM_LDFLAGS += -m elf32ltsmip
+endif
CONFIG_STANDALONE_LOAD_ADDR ?= 0x80200000 -T mips.lds
diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
index 9c1b2f76d0..76abbaa273 100644
--- a/arch/mips/cpu/mips32/start.S
+++ b/arch/mips/cpu/mips32/start.S
@@ -47,27 +47,16 @@
.set pop
.endm
- .macro setup_c0_status_reset
-#ifdef CONFIG_64BIT
- setup_c0_status ST0_KX 0
-#else
- setup_c0_status 0 0
-#endif
- .endm
-
-#define RVECENT(f,n) \
- b f; nop
-#define XVECENT(f,bev) \
- b f ; \
- li k0,bev
-
.set noreorder
.globl _start
.text
_start:
- RVECENT(reset,0) # U-boot entry point
- RVECENT(reset,1) # software reboot
+ /* U-boot entry point */
+ b reset
+ nop
+
+ .org 0x10
#ifdef CONFIG_SYS_XWAY_EBU_BOOTCFG
/*
* Almost all Lantiq XWAY SoC devices have an external bus unit (EBU) to
@@ -77,141 +66,39 @@ _start:
* device with correct parameters. This config option is board-specific.
*/
.word CONFIG_SYS_XWAY_EBU_BOOTCFG
- .word 0x00000000
-#else
- RVECENT(romReserved,2)
+ .word 0x0
#endif
- RVECENT(romReserved,3)
- RVECENT(romReserved,4)
- RVECENT(romReserved,5)
- RVECENT(romReserved,6)
- RVECENT(romReserved,7)
- RVECENT(romReserved,8)
- RVECENT(romReserved,9)
- RVECENT(romReserved,10)
- RVECENT(romReserved,11)
- RVECENT(romReserved,12)
- RVECENT(romReserved,13)
- RVECENT(romReserved,14)
- RVECENT(romReserved,15)
- RVECENT(romReserved,16)
- RVECENT(romReserved,17)
- RVECENT(romReserved,18)
- RVECENT(romReserved,19)
- RVECENT(romReserved,20)
- RVECENT(romReserved,21)
- RVECENT(romReserved,22)
- RVECENT(romReserved,23)
- RVECENT(romReserved,24)
- RVECENT(romReserved,25)
- RVECENT(romReserved,26)
- RVECENT(romReserved,27)
- RVECENT(romReserved,28)
- RVECENT(romReserved,29)
- RVECENT(romReserved,30)
- RVECENT(romReserved,31)
- RVECENT(romReserved,32)
- RVECENT(romReserved,33)
- RVECENT(romReserved,34)
- RVECENT(romReserved,35)
- RVECENT(romReserved,36)
- RVECENT(romReserved,37)
- RVECENT(romReserved,38)
- RVECENT(romReserved,39)
- RVECENT(romReserved,40)
- RVECENT(romReserved,41)
- RVECENT(romReserved,42)
- RVECENT(romReserved,43)
- RVECENT(romReserved,44)
- RVECENT(romReserved,45)
- RVECENT(romReserved,46)
- RVECENT(romReserved,47)
- RVECENT(romReserved,48)
- RVECENT(romReserved,49)
- RVECENT(romReserved,50)
- RVECENT(romReserved,51)
- RVECENT(romReserved,52)
- RVECENT(romReserved,53)
- RVECENT(romReserved,54)
- RVECENT(romReserved,55)
- RVECENT(romReserved,56)
- RVECENT(romReserved,57)
- RVECENT(romReserved,58)
- RVECENT(romReserved,59)
- RVECENT(romReserved,60)
- RVECENT(romReserved,61)
- RVECENT(romReserved,62)
- RVECENT(romReserved,63)
- XVECENT(romExcHandle,0x200) # bfc00200: R4000 tlbmiss vector
- RVECENT(romReserved,65)
- RVECENT(romReserved,66)
- RVECENT(romReserved,67)
- RVECENT(romReserved,68)
- RVECENT(romReserved,69)
- RVECENT(romReserved,70)
- RVECENT(romReserved,71)
- RVECENT(romReserved,72)
- RVECENT(romReserved,73)
- RVECENT(romReserved,74)
- RVECENT(romReserved,75)
- RVECENT(romReserved,76)
- RVECENT(romReserved,77)
- RVECENT(romReserved,78)
- RVECENT(romReserved,79)
- XVECENT(romExcHandle,0x280) # bfc00280: R4000 xtlbmiss vector
- RVECENT(romReserved,81)
- RVECENT(romReserved,82)
- RVECENT(romReserved,83)
- RVECENT(romReserved,84)
- RVECENT(romReserved,85)
- RVECENT(romReserved,86)
- RVECENT(romReserved,87)
- RVECENT(romReserved,88)
- RVECENT(romReserved,89)
- RVECENT(romReserved,90)
- RVECENT(romReserved,91)
- RVECENT(romReserved,92)
- RVECENT(romReserved,93)
- RVECENT(romReserved,94)
- RVECENT(romReserved,95)
- XVECENT(romExcHandle,0x300) # bfc00300: R4000 cache vector
- RVECENT(romReserved,97)
- RVECENT(romReserved,98)
- RVECENT(romReserved,99)
- RVECENT(romReserved,100)
- RVECENT(romReserved,101)
- RVECENT(romReserved,102)
- RVECENT(romReserved,103)
- RVECENT(romReserved,104)
- RVECENT(romReserved,105)
- RVECENT(romReserved,106)
- RVECENT(romReserved,107)
- RVECENT(romReserved,108)
- RVECENT(romReserved,109)
- RVECENT(romReserved,110)
- RVECENT(romReserved,111)
- XVECENT(romExcHandle,0x380) # bfc00380: R4000 general vector
- RVECENT(romReserved,113)
- RVECENT(romReserved,114)
- RVECENT(romReserved,115)
- RVECENT(romReserved,116)
- RVECENT(romReserved,116)
- RVECENT(romReserved,118)
- RVECENT(romReserved,119)
- RVECENT(romReserved,120)
- RVECENT(romReserved,121)
- RVECENT(romReserved,122)
- RVECENT(romReserved,123)
- RVECENT(romReserved,124)
- RVECENT(romReserved,125)
- RVECENT(romReserved,126)
- RVECENT(romReserved,127)
- /*
- * We hope there are no more reserved vectors!
- * 128 * 8 == 1024 == 0x400
- * so this is address R_VEC+0x400 == 0xbfc00400
- */
+ .org 0x200
+ /* TLB refill, 32 bit task */
+1: b 1b
+ nop
+
+ .org 0x280
+ /* XTLB refill, 64 bit task */
+1: b 1b
+ nop
+
+ .org 0x300
+ /* Cache error exception */
+1: b 1b
+ nop
+
+ .org 0x380
+ /* General exception */
+1: b 1b
+ nop
+
+ .org 0x400
+ /* Catch interrupt exceptions */
+1: b 1b
+ nop
+
+ .org 0x480
+ /* EJTAG debug exception */
+1: b 1b
+ nop
+
.align 4
reset:
@@ -222,7 +109,7 @@ reset:
/* WP(Watch Pending), SW0/1 should be cleared */
mtc0 zero, CP0_CAUSE
- setup_c0_status_reset
+ setup_c0_status 0 0
/* Init Timer */
mtc0 zero, CP0_COUNT
@@ -258,8 +145,7 @@ reset:
#endif
/* Set up temporary stack */
- li t0, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET
- la sp, 0(t0)
+ li sp, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET
la t9, board_init_f
jr t9
@@ -280,58 +166,45 @@ reset:
relocate_code:
move sp, a0 # set new stack pointer
+ move s0, a1 # save gd in s0
+ move s2, a2 # save destination address in s2
+
li t0, CONFIG_SYS_MONITOR_BASE
+ sub s1, s2, t0 # s1 <-- relocation offset
+
la t3, in_ram
- lw t2, -12(t3) # t2 <-- uboot_end_data
+ lw t2, -12(t3) # t2 <-- __image_copy_end
move t1, a2
- move s2, a2 # s2 <-- destination address
- /*
- * Fix $gp:
- *
- * New $gp = (Old $gp - CONFIG_SYS_MONITOR_BASE) + Destination Address
- */
- move t6, gp
- sub gp, CONFIG_SYS_MONITOR_BASE
- add gp, a2 # gp now adjusted
- sub s1, gp, t6 # s1 <-- relocation offset
+ add gp, s1 # adjust gp
/*
* t0 = source address
* t1 = target address
* t2 = source end address
*/
-
- /*
- * Save destination address and size for later usage in flush_cache()
- */
- move s0, a1 # save gd in s0
- move a0, t1 # a0 <-- destination addr
- sub a1, t2, t0 # a1 <-- size
-
1:
lw t3, 0(t0)
sw t3, 0(t1)
addu t0, 4
- ble t0, t2, 1b
+ blt t0, t2, 1b
addu t1, 4
/* If caches were enabled, we would have to flush them here. */
-
- /* a0 & a1 are already set up for flush_cache(start, size) */
+ sub a1, t1, s2 # a1 <-- size
la t9, flush_cache
jalr t9
- nop
+ move a0, s2 # a0 <-- destination address
/* Jump to where we've relocated ourselves */
addi t0, s2, in_ram - _start
jr t0
nop
- .word _gp
+ .word __rel_dyn_end
+ .word __rel_dyn_start
+ .word __image_copy_end
.word _GLOBAL_OFFSET_TABLE_
- .word uboot_end_data
- .word uboot_end
.word num_got_entries
in_ram:
@@ -342,10 +215,8 @@ in_ram:
* generated by GNU ld. Skip these reserved entries from relocation.
*/
lw t3, -4(t0) # t3 <-- num_got_entries
- lw t4, -16(t0) # t4 <-- _GLOBAL_OFFSET_TABLE_
- lw t5, -20(t0) # t5 <-- _gp
- sub t4, t5 # compute offset
- add t4, t4, gp # t4 now holds relocated _G_O_T_
+ lw t4, -8(t0) # t4 <-- _GLOBAL_OFFSET_TABLE_
+ add t4, s1 # t4 now holds relocated _G_O_T_
addi t4, t4, 8 # skipping first two entries
li t2, 2
1:
@@ -358,17 +229,45 @@ in_ram:
blt t2, t3, 1b
addi t4, 4
- /* Clear BSS */
- lw t1, -12(t0) # t1 <-- uboot_end_data
- lw t2, -8(t0) # t2 <-- uboot_end
- add t1, s1 # adjust pointers
- add t2, s1
+ /* Update dynamic relocations */
+ lw t1, -16(t0) # t1 <-- __rel_dyn_start
+ lw t2, -20(t0) # t2 <-- __rel_dyn_end
+
+ b 2f # skip first reserved entry
+ addi t1, 8
+
+1:
+ lw t3, -4(t1) # t3 <-- relocation info
+
+ sub t3, 3
+ bnez t3, 2f # skip non R_MIPS_REL32 entries
+ nop
+
+ lw t3, -8(t1) # t3 <-- location to fix up in FLASH
+
+ lw t4, 0(t3) # t4 <-- original pointer
+ add t4, s1 # t4 <-- adjusted pointer
+
+ add t3, s1 # t3 <-- location to fix up in RAM
+ sw t4, 0(t3)
+
+2:
+ blt t1, t2, 1b
+ addi t1, 8 # each rel.dyn entry is 8 bytes
+
+ /*
+ * Clear BSS
+ *
+ * GOT is now relocated. Thus __bss_start and __bss_end can be
+ * accessed directly via $gp.
+ */
+ la t1, __bss_start # t1 <-- __bss_start
+ la t2, __bss_end # t2 <-- __bss_end
- sub t1, 4
1:
- addi t1, 4
- bltl t1, t2, 1b
- sw zero, 0(t1)
+ sw zero, 0(t1)
+ blt t1, t2, 1b
+ addi t1, 4
move a0, s0 # a0 <-- gd
la t9, board_init_r
@@ -376,10 +275,3 @@ in_ram:
move a1, s2
.end relocate_code
-
- /* Exception handlers */
-romReserved:
- b romReserved
-
-romExcHandle:
- b romExcHandle
generated by cgit (git 2.34.1) at 2024-12-28 04:23:00 +0000