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-rw-r--r--arch/mips/cpu/mips32/config.mk6
-rw-r--r--arch/mips/cpu/mips32/start.S41
-rw-r--r--arch/mips/cpu/mips64/start.S40
-rw-r--r--arch/mips/cpu/u-boot.lds84
-rw-r--r--arch/mips/cpu/xburst/config.mk6
-rw-r--r--arch/mips/cpu/xburst/start.S19
6 files changed, 126 insertions, 70 deletions
diff --git a/arch/mips/cpu/mips32/config.mk b/arch/mips/cpu/mips32/config.mk
index 481e9844db..7399701fe9 100644
--- a/arch/mips/cpu/mips32/config.mk
+++ b/arch/mips/cpu/mips32/config.mk
@@ -30,5 +30,11 @@
MIPSFLAGS := -march=mips32r2
PLATFORM_CPPFLAGS += $(MIPSFLAGS)
+PLATFORM_CPPFLAGS += -mabi=32 -DCONFIG_32BIT
+ifdef CONFIG_SYS_BIG_ENDIAN
+PLATFORM_LDFLAGS += -m elf32btsmip
+else
+PLATFORM_LDFLAGS += -m elf32ltsmip
+endif
CONFIG_STANDALONE_LOAD_ADDR ?= 0x80200000 -T mips.lds
diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
index 9c1b2f76d0..51ce914fad 100644
--- a/arch/mips/cpu/mips32/start.S
+++ b/arch/mips/cpu/mips32/start.S
@@ -258,8 +258,7 @@ reset:
#endif
/* Set up temporary stack */
- li t0, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET
- la sp, 0(t0)
+ li sp, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET
la t9, board_init_f
jr t9
@@ -280,55 +279,41 @@ reset:
relocate_code:
move sp, a0 # set new stack pointer
+ move s0, a1 # save gd in s0
+ move s2, a2 # save destination address in s2
+
li t0, CONFIG_SYS_MONITOR_BASE
+ sub s1, s2, t0 # s1 <-- relocation offset
+
la t3, in_ram
lw t2, -12(t3) # t2 <-- uboot_end_data
move t1, a2
- move s2, a2 # s2 <-- destination address
- /*
- * Fix $gp:
- *
- * New $gp = (Old $gp - CONFIG_SYS_MONITOR_BASE) + Destination Address
- */
- move t6, gp
- sub gp, CONFIG_SYS_MONITOR_BASE
- add gp, a2 # gp now adjusted
- sub s1, gp, t6 # s1 <-- relocation offset
+ add gp, s1 # adjust gp
/*
* t0 = source address
* t1 = target address
* t2 = source end address
*/
-
- /*
- * Save destination address and size for later usage in flush_cache()
- */
- move s0, a1 # save gd in s0
- move a0, t1 # a0 <-- destination addr
- sub a1, t2, t0 # a1 <-- size
-
1:
lw t3, 0(t0)
sw t3, 0(t1)
addu t0, 4
- ble t0, t2, 1b
+ blt t0, t2, 1b
addu t1, 4
/* If caches were enabled, we would have to flush them here. */
-
- /* a0 & a1 are already set up for flush_cache(start, size) */
+ sub a1, t1, s2 # a1 <-- size
la t9, flush_cache
jalr t9
- nop
+ move a0, s2 # a0 <-- destination address
/* Jump to where we've relocated ourselves */
addi t0, s2, in_ram - _start
jr t0
nop
- .word _gp
.word _GLOBAL_OFFSET_TABLE_
.word uboot_end_data
.word uboot_end
@@ -343,9 +328,7 @@ in_ram:
*/
lw t3, -4(t0) # t3 <-- num_got_entries
lw t4, -16(t0) # t4 <-- _GLOBAL_OFFSET_TABLE_
- lw t5, -20(t0) # t5 <-- _gp
- sub t4, t5 # compute offset
- add t4, t4, gp # t4 now holds relocated _G_O_T_
+ add t4, s1 # t4 now holds relocated _G_O_T_
addi t4, t4, 8 # skipping first two entries
li t2, 2
1:
@@ -380,6 +363,8 @@ in_ram:
/* Exception handlers */
romReserved:
b romReserved
+ nop
romExcHandle:
b romExcHandle
+ nop
diff --git a/arch/mips/cpu/mips64/start.S b/arch/mips/cpu/mips64/start.S
index 2b8d531e73..15225945e9 100644
--- a/arch/mips/cpu/mips64/start.S
+++ b/arch/mips/cpu/mips64/start.S
@@ -137,8 +137,7 @@ reset:
#endif
/* Set up temporary stack */
- dli t0, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET
- dla sp, 0(t0)
+ dli sp, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET
dla t9, board_init_f
jr t9
@@ -159,55 +158,41 @@ reset:
relocate_code:
move sp, a0 # set new stack pointer
+ move s0, a1 # save gd in s0
+ move s2, a2 # save destination address in s2
+
dli t0, CONFIG_SYS_MONITOR_BASE
+ dsub s1, s2, t0 # s1 <-- relocation offset
+
dla t3, in_ram
ld t2, -24(t3) # t2 <-- uboot_end_data
move t1, a2
- move s2, a2 # s2 <-- destination address
- /*
- * Fix $gp:
- *
- * New $gp = (Old $gp - CONFIG_SYS_MONITOR_BASE) + Destination Address
- */
- move t8, gp
- dsub gp, CONFIG_SYS_MONITOR_BASE
- dadd gp, a2 # gp now adjusted
- dsub s1, gp, t8 # s1 <-- relocation offset
+ dadd gp, s1 # adjust gp
/*
* t0 = source address
* t1 = target address
* t2 = source end address
*/
-
- /*
- * Save destination address and size for dlater usage in flush_cache()
- */
- move s0, a1 # save gd in s0
- move a0, t1 # a0 <-- destination addr
- dsub a1, t2, t0 # a1 <-- size
-
1:
lw t3, 0(t0)
sw t3, 0(t1)
daddu t0, 4
- ble t0, t2, 1b
+ blt t0, t2, 1b
daddu t1, 4
/* If caches were enabled, we would have to flush them here. */
-
- /* a0 & a1 are already set up for flush_cache(start, size) */
+ dsub a1, t1, s2 # a1 <-- size
dla t9, flush_cache
jalr t9
- nop
+ move a0, s2 # a0 <-- destination address
/* Jump to where we've relocated ourselves */
daddi t0, s2, in_ram - _start
jr t0
nop
- .dword _gp
.dword _GLOBAL_OFFSET_TABLE_
.dword uboot_end_data
.dword uboot_end
@@ -222,9 +207,7 @@ in_ram:
*/
ld t3, -8(t0) # t3 <-- num_got_entries
ld t8, -32(t0) # t8 <-- _GLOBAL_OFFSET_TABLE_
- ld t9, -40(t0) # t9 <-- _gp
- dsub t8, t9 # compute offset
- dadd t8, t8, gp # t8 now holds relocated _G_O_T_
+ dadd t8, s1 # t8 now holds relocated _G_O_T_
daddi t8, t8, 16 # skipping first two entries
dli t2, 2
1:
@@ -259,3 +242,4 @@ in_ram:
/* Exception handlers */
romReserved:
b romReserved
+ nop
diff --git a/arch/mips/cpu/u-boot.lds b/arch/mips/cpu/u-boot.lds
new file mode 100644
index 0000000000..37c9d2364a
--- /dev/null
+++ b/arch/mips/cpu/u-boot.lds
@@ -0,0 +1,84 @@
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk Engineering, <wd@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#if defined(CONFIG_64BIT)
+#define PTR_COUNT_SHIFT 3
+#else
+#define PTR_COUNT_SHIFT 2
+#endif
+
+OUTPUT_ARCH(mips)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN(4);
+ .text : {
+ *(.text*)
+ }
+
+ . = ALIGN(4);
+ .rodata : {
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ }
+
+ . = ALIGN(4);
+ .data : {
+ *(.data*)
+ }
+
+ . = .;
+ _gp = ALIGN(16) + 0x7ff0;
+
+ .got : {
+ __got_start = .;
+ *(.got)
+ __got_end = .;
+ }
+
+ . = ALIGN(4);
+ .sdata : {
+ *(.sdata*)
+ }
+
+ . = ALIGN(4);
+ .u_boot_list : {
+ #include <u-boot.lst>
+ }
+
+ uboot_end_data = .;
+
+ num_got_entries = (__got_end - __got_start) >> PTR_COUNT_SHIFT;
+
+ . = ALIGN(4);
+ .sbss : {
+ *(.sbss*)
+ }
+
+ .bss : {
+ *(.bss*)
+ . = ALIGN(4);
+ }
+ uboot_end = .;
+}
diff --git a/arch/mips/cpu/xburst/config.mk b/arch/mips/cpu/xburst/config.mk
index 1536746c97..cf5fa6ab6b 100644
--- a/arch/mips/cpu/xburst/config.mk
+++ b/arch/mips/cpu/xburst/config.mk
@@ -21,5 +21,11 @@
#
PLATFORM_CPPFLAGS += -march=mips32
+PLATFORM_CPPFLAGS += -mabi=32 -DCONFIG_32BIT
+ifdef CONFIG_SYS_BIG_ENDIAN
+PLATFORM_LDFLAGS += -m elf32btsmip
+else
+PLATFORM_LDFLAGS += -m elf32ltsmip
+endif
CONFIG_STANDALONE_LOAD_ADDR ?= 0x80200000 -T mips.lds
diff --git a/arch/mips/cpu/xburst/start.S b/arch/mips/cpu/xburst/start.S
index 3a8280cb0a..50b7fb1021 100644
--- a/arch/mips/cpu/xburst/start.S
+++ b/arch/mips/cpu/xburst/start.S
@@ -64,19 +64,13 @@ relocate_code:
move sp, a0 # set new stack pointer
li t0, CONFIG_SYS_MONITOR_BASE
+ sub t6, a2, t0 # t6 <-- relocation offset
+
la t3, in_ram
lw t2, -12(t3) # t2 <-- uboot_end_data
move t1, a2
- /*
- * Fix $gp:
- *
- * New $gp = (Old $gp - CONFIG_SYS_MONITOR_BASE) + Destination Address
- */
- move t6, gp
- sub gp, CONFIG_SYS_MONITOR_BASE
- add gp, a2 # gp now adjusted
- sub t6, gp, t6 # t6 <-- relocation offset
+ add gp, t6 # adjust gp
/*
* t0 = source address
@@ -87,7 +81,7 @@ relocate_code:
lw t3, 0(t0)
sw t3, 0(t1)
addu t0, 4
- ble t0, t2, 1b
+ blt t0, t2, 1b
addu t1, 4
/* If caches were enabled, we would have to flush them here. */
@@ -122,7 +116,6 @@ relocate_code:
jr t0
nop
- .word _gp
.word _GLOBAL_OFFSET_TABLE_
.word uboot_end_data
.word uboot_end
@@ -137,9 +130,7 @@ in_ram:
*/
lw t3, -4(t0) # t3 <-- num_got_entries
lw t4, -16(t0) # t4 <-- _GLOBAL_OFFSET_TABLE_
- lw t5, -20(t0) # t5 <-- _gp
- sub t4, t5 # compute offset
- add t4, t4, gp # t4 now holds relocated _G_O_T_
+ add t4, t6 # t4 now holds relocated _G_O_T_
addi t4, t4, 8 # skipping first two entries
li t2, 2
1:
generated by cgit (git 2.34.1) at 2024-12-26 05:43:21 +0000