summaryrefslogtreecommitdiff
path: root/arch/nds32/cpu/n1213
diff options
context:
space:
mode:
Diffstat (limited to 'arch/nds32/cpu/n1213')
-rw-r--r--arch/nds32/cpu/n1213/Makefile4
-rw-r--r--arch/nds32/cpu/n1213/ag101/Makefile8
-rw-r--r--arch/nds32/cpu/n1213/ag101/lowlevel_init.S32
-rw-r--r--arch/nds32/cpu/n1213/ag101/timer.c7
-rw-r--r--arch/nds32/cpu/n1213/ag102/Makefile8
-rw-r--r--arch/nds32/cpu/n1213/ag102/lowlevel_init.S26
-rw-r--r--arch/nds32/cpu/n1213/ag102/timer.c7
7 files changed, 75 insertions, 17 deletions
diff --git a/arch/nds32/cpu/n1213/Makefile b/arch/nds32/cpu/n1213/Makefile
index 4514468d21..b8e0d72739 100644
--- a/arch/nds32/cpu/n1213/Makefile
+++ b/arch/nds32/cpu/n1213/Makefile
@@ -15,8 +15,8 @@ LIB = $(obj)lib$(CPU).o
START = start.o
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS-y))
START := $(addprefix $(obj),$(START))
all: $(obj).depend $(START) $(LIB)
diff --git a/arch/nds32/cpu/n1213/ag101/Makefile b/arch/nds32/cpu/n1213/ag101/Makefile
index fb388f05df..b53a3eb5f4 100644
--- a/arch/nds32/cpu/n1213/ag101/Makefile
+++ b/arch/nds32/cpu/n1213/ag101/Makefile
@@ -17,15 +17,15 @@ LIB = $(obj)lib$(SOC).o
COBJS-y := cpu.o timer.o
ifndef CONFIG_SKIP_LOWLEVEL_INIT
-SOBJS := lowlevel_init.o
+SOBJS-y := lowlevel_init.o
endif
ifndef CONFIG_SKIP_TRUNOFF_WATCHDOG
-SOBJS += watchdog.o
+SOBJS-y += watchdog.o
endif
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
+SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
all: $(obj).depend $(LIB)
diff --git a/arch/nds32/cpu/n1213/ag101/lowlevel_init.S b/arch/nds32/cpu/n1213/ag101/lowlevel_init.S
index 66ed8f0cfa..810326d200 100644
--- a/arch/nds32/cpu/n1213/ag101/lowlevel_init.S
+++ b/arch/nds32/cpu/n1213/ag101/lowlevel_init.S
@@ -22,6 +22,7 @@
#define SDMC_CR1_A (CONFIG_FTSDMC021_BASE + FTSDMC021_CR1)
#define SDMC_CR2_A (CONFIG_FTSDMC021_BASE + FTSDMC021_CR2)
#define SDMC_B0_BSR_A (CONFIG_FTSDMC021_BASE + FTSDMC021_BANK0_BSR)
+#define SDMC_B1_BSR_A (CONFIG_FTSDMC021_BASE + FTSDMC021_BANK1_BSR)
#define SDMC_TP1_D CONFIG_SYS_FTSDMC021_TP1
#define SDMC_TP2_D CONFIG_SYS_FTSDMC021_TP2
@@ -29,6 +30,7 @@
#define SDMC_CR2_D CONFIG_SYS_FTSDMC021_CR2
#define SDMC_B0_BSR_D CONFIG_SYS_FTSDMC021_BANK0_BSR
+#define SDMC_B1_BSR_D CONFIG_SYS_FTSDMC021_BANK1_BSR
/*
* parameters for the static memory controller
@@ -80,6 +82,11 @@ lowlevel_init:
led 0x10
jal remap
+#if (defined(NDS32_EXT_FPU_DP) || defined(NDS32_EXT_FPU_SP))
+ led 0x1f
+ jal enable_fpu
+#endif
+
led 0x20
ret $r10
@@ -151,12 +158,12 @@ relo_base:
*/
led 0x1a
write32 SDMC_B0_BSR_A, SDMC_B0_BSR_D ! 0x00001100
+ write32 SDMC_B1_BSR_A, SDMC_B1_BSR_D ! 0x00001140
/* clear empty BSR registers */
led 0x1b
li $r4, CONFIG_FTSDMC021_BASE
li $r5, 0x0
- swi $r5, [$r4 + FTSDMC021_BANK1_BSR]
swi $r5, [$r4 + FTSDMC021_BANK2_BSR]
swi $r5, [$r4 + FTSDMC021_BANK3_BSR]
@@ -207,6 +214,8 @@ relo_base:
* - after remap: flash/rom 0x80000000, sdram: 0x00000000
*/
led 0x1c
+ write32 SDMC_B0_BSR_A, 0x00001000
+ write32 SDMC_B1_BSR_A, 0x00001040
setbf15 AHBC_CR_A, FTAHBC020S_CR_REMAP ! 0x1
#endif /* #ifdef CONFIG_MEM_REMAP */
@@ -214,6 +223,27 @@ relo_base:
2:
ret
+ /*
+ * enable_fpu:
+ * Some of Andes CPU version support FPU coprocessor, if so,
+ * and toolchain support FPU instruction set, we should enable it.
+ */
+#if (defined(NDS32_EXT_FPU_DP) || defined(NDS32_EXT_FPU_SP))
+enable_fpu:
+ mfsr $r0, $CPU_VER /* enable FPU if it exists */
+ srli $r0, $r0, 3
+ andi $r0, $r0, 1
+ beqz $r0, 1f /* skip if no COP */
+ mfsr $r0, $FUCOP_EXIST
+ srli $r0, $r0, 31
+ beqz $r0, 1f /* skip if no FPU */
+ mfsr $r0, $FUCOP_CTL
+ ori $r0, $r0, 1
+ mtsr $r0, $FUCOP_CTL
+1:
+ ret
+#endif
+
.globl show_led
show_led:
li $r8, (CONFIG_DEBUG_LED)
diff --git a/arch/nds32/cpu/n1213/ag101/timer.c b/arch/nds32/cpu/n1213/ag101/timer.c
index ec6eb52f2e..758b354110 100644
--- a/arch/nds32/cpu/n1213/ag101/timer.c
+++ b/arch/nds32/cpu/n1213/ag101/timer.c
@@ -71,7 +71,8 @@ void reset_timer_masked(void)
#ifdef CONFIG_FTTMR010_EXT_CLK
lastdec = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
#else
- lastdec = readl(&tmr->timer3_counter) / (CONFIG_SYS_CLK_FREQ / 2);
+ lastdec = readl(&tmr->timer3_counter) /
+ (CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ);
#endif
timestamp = 0; /* start "advancing" time stamp from 0 */
@@ -95,8 +96,8 @@ ulong get_timer_masked(void)
#ifdef CONFIG_FTTMR010_EXT_CLK
ulong now = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
#else
- ulong now = readl(&tmr->timer3_counter) / \
- (CONFIG_SYS_CLK_FREQ / 2 / 1024);
+ ulong now = readl(&tmr->timer3_counter) /
+ (CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ);
#endif
debug("%s(): now = %lx, lastdec = %lx\n", __func__, now, lastdec);
diff --git a/arch/nds32/cpu/n1213/ag102/Makefile b/arch/nds32/cpu/n1213/ag102/Makefile
index fb388f05df..b53a3eb5f4 100644
--- a/arch/nds32/cpu/n1213/ag102/Makefile
+++ b/arch/nds32/cpu/n1213/ag102/Makefile
@@ -17,15 +17,15 @@ LIB = $(obj)lib$(SOC).o
COBJS-y := cpu.o timer.o
ifndef CONFIG_SKIP_LOWLEVEL_INIT
-SOBJS := lowlevel_init.o
+SOBJS-y := lowlevel_init.o
endif
ifndef CONFIG_SKIP_TRUNOFF_WATCHDOG
-SOBJS += watchdog.o
+SOBJS-y += watchdog.o
endif
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
+SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
all: $(obj).depend $(LIB)
diff --git a/arch/nds32/cpu/n1213/ag102/lowlevel_init.S b/arch/nds32/cpu/n1213/ag102/lowlevel_init.S
index 94018483f2..238410dde4 100644
--- a/arch/nds32/cpu/n1213/ag102/lowlevel_init.S
+++ b/arch/nds32/cpu/n1213/ag102/lowlevel_init.S
@@ -98,6 +98,11 @@ lowlevel_init:
led 0x20
jal remap
+#if (defined(NDS32_EXT_FPU_DP) || defined(NDS32_EXT_FPU_SP))
+ led 0x2f
+ jal enable_fpu
+#endif
+
led 0x30
ret $r10
@@ -273,6 +278,27 @@ relo_base:
2:
ret
+ /*
+ * enable_fpu:
+ * Some of Andes CPU version support FPU coprocessor, if so,
+ * and toolchain support FPU instruction set, we should enable it.
+ */
+#if (defined(NDS32_EXT_FPU_DP) || defined(NDS32_EXT_FPU_SP))
+enable_fpu:
+ mfsr $r0, $CPU_VER /* enable FPU if it exists */
+ srli $r0, $r0, 3
+ andi $r0, $r0, 1
+ beqz $r0, 1f /* skip if no COP */
+ mfsr $r0, $FUCOP_EXIST
+ srli $r0, $r0, 31
+ beqz $r0, 1f /* skip if no FPU */
+ mfsr $r0, $FUCOP_CTL
+ ori $r0, $r0, 1
+ mtsr $r0, $FUCOP_CTL
+1:
+ ret
+#endif
+
.globl show_led
show_led:
li $r8, (CONFIG_DEBUG_LED)
diff --git a/arch/nds32/cpu/n1213/ag102/timer.c b/arch/nds32/cpu/n1213/ag102/timer.c
index ec6eb52f2e..758b354110 100644
--- a/arch/nds32/cpu/n1213/ag102/timer.c
+++ b/arch/nds32/cpu/n1213/ag102/timer.c
@@ -71,7 +71,8 @@ void reset_timer_masked(void)
#ifdef CONFIG_FTTMR010_EXT_CLK
lastdec = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
#else
- lastdec = readl(&tmr->timer3_counter) / (CONFIG_SYS_CLK_FREQ / 2);
+ lastdec = readl(&tmr->timer3_counter) /
+ (CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ);
#endif
timestamp = 0; /* start "advancing" time stamp from 0 */
@@ -95,8 +96,8 @@ ulong get_timer_masked(void)
#ifdef CONFIG_FTTMR010_EXT_CLK
ulong now = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
#else
- ulong now = readl(&tmr->timer3_counter) / \
- (CONFIG_SYS_CLK_FREQ / 2 / 1024);
+ ulong now = readl(&tmr->timer3_counter) /
+ (CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ);
#endif
debug("%s(): now = %lx, lastdec = %lx\n", __func__, now, lastdec);
generated by cgit (git 2.34.1) at 2024-12-24 17:10:28 +0000