1 files changed, 49 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc8xx/cache.c b/arch/powerpc/cpu/mpc8xx/cache.c
new file mode 100644
index 0000000000..f8cd5f5e33
--- /dev/null
+++ b/arch/powerpc/cpu/mpc8xx/cache.c
@@ -0,0 +1,49 @@
+/*
+ * (C) Copyright 2017
+ * Christophe Leroy, CS Systemes d'Information, christophe.leroy@c-s.fr
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <asm/ppc.h>
+#include <asm/io.h>
+#include <asm/mmu.h>
+
+int icache_status(void)
+{
+	return !!(mfspr(IC_CST) & IDC_ENABLED);
+}
+
+void icache_enable(void)
+{
+	sync();
+	mtspr(IC_CST, IDC_INVALL);
+	mtspr(IC_CST, IDC_ENABLE);
+}
+
+void icache_disable(void)
+{
+	sync();
+	mtspr(IC_CST, IDC_DISABLE);
+}
+
+int dcache_status(void)
+{
+	return !!(mfspr(IC_CST) & IDC_ENABLED);
+}
+
+void dcache_enable(void)
+{
+	mtspr(MD_CTR, MD_RESETVAL);	/* Set cache mode with MMU off */
+	mtspr(DC_CST, IDC_INVALL);
+	mtspr(DC_CST, IDC_ENABLE);
+}
+
+void dcache_disable(void)
+{
+	sync();
+	mtspr(DC_CST, IDC_DISABLE);
+	mtspr(DC_CST, IDC_INVALL);
+}