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-rw-r--r--arch/powerpc/cpu/mpc85xx/Makefile3
-rw-r--r--arch/powerpc/cpu/mpc85xx/fdt.c2
-rw-r--r--arch/powerpc/cpu/mpc85xx/p3060_ids.c117
-rw-r--r--arch/powerpc/cpu/mpc85xx/p3060_serdes.c118
-rw-r--r--arch/powerpc/cpu/mpc8xxx/cpu.c1
5 files changed, 1 insertions, 240 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
index 2f79a03119..71b8bb7207 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -65,7 +65,6 @@ COBJS-$(CONFIG_P2020) += ddr-gen3.o
COBJS-$(CONFIG_PPC_P2040) += ddr-gen3.o
COBJS-$(CONFIG_PPC_P2041) += ddr-gen3.o
COBJS-$(CONFIG_PPC_P3041) += ddr-gen3.o
-COBJS-$(CONFIG_PPC_P3060) += ddr-gen3.o
COBJS-$(CONFIG_PPC_P4080) += ddr-gen3.o
COBJS-$(CONFIG_PPC_P5020) += ddr-gen3.o
COBJS-$(CONFIG_BSC9131) += ddr-gen3.o
@@ -81,7 +80,6 @@ COBJS-$(CONFIG_SYS_DPAA_QBMAN) += portals.o
COBJS-$(CONFIG_PPC_P2040) += p2041_ids.o
COBJS-$(CONFIG_PPC_P2041) += p2041_ids.o
COBJS-$(CONFIG_PPC_P3041) += p3041_ids.o
-COBJS-$(CONFIG_PPC_P3060) += p3060_ids.o
COBJS-$(CONFIG_PPC_P4080) += p4080_ids.o
COBJS-$(CONFIG_PPC_P5020) += p5020_ids.o
@@ -113,7 +111,6 @@ COBJS-$(CONFIG_P2020) += p2020_serdes.o
COBJS-$(CONFIG_PPC_P2040) += p2041_serdes.o
COBJS-$(CONFIG_PPC_P2041) += p2041_serdes.o
COBJS-$(CONFIG_PPC_P3041) += p3041_serdes.o
-COBJS-$(CONFIG_PPC_P3060) += p3060_serdes.o
COBJS-$(CONFIG_PPC_P4080) += p4080_serdes.o
COBJS-$(CONFIG_PPC_P5020) += p5020_serdes.o
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 21c3ad49bf..2ef2078461 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -534,7 +534,7 @@ void fdt_fixup_fman_firmware(void *blob)
#define fdt_fixup_fman_firmware(x)
#endif
-#if defined(CONFIG_PPC_P4080) || defined(CONFIG_PPC_P3060)
+#if defined(CONFIG_PPC_P4080)
static void fdt_fixup_usb(void *fdt)
{
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
diff --git a/arch/powerpc/cpu/mpc85xx/p3060_ids.c b/arch/powerpc/cpu/mpc85xx/p3060_ids.c
deleted file mode 100644
index d32142f636..0000000000
--- a/arch/powerpc/cpu/mpc85xx/p3060_ids.c
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- * Copyright 2011 Freescale Semiconductor, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/fsl_portals.h>
-#include <asm/fsl_liodn.h>
-
-#ifdef CONFIG_SYS_DPAA_QBMAN
-struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
- /* dqrr liodn, frame data liodn, liodn off, sdest */
- SET_QP_INFO( 1, 2, 1, 0),
- SET_QP_INFO( 3, 4, 2, 1),
- SET_QP_INFO( 5, 6, 3, 2),
- SET_QP_INFO( 7, 8, 4, 3),
- SET_QP_INFO( 9, 10, 5, 4),
- SET_QP_INFO(11, 12, 6, 5),
- SET_QP_INFO(13, 14, 7, 6),
- SET_QP_INFO(15, 16, 8, 7),
- SET_QP_INFO(17, 18, 9, 0), /* for now sdest to 0 */
- SET_QP_INFO(19, 20, 10, 0), /* for now sdest to 0 */
-};
-#endif
-
-struct srio_liodn_id_table srio_liodn_tbl[] = {
- SET_SRIO_LIODN_1(1, 198),
- SET_SRIO_LIODN_1(2, 199),
-};
-int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);
-
-struct liodn_id_table liodn_tbl[] = {
- SET_USB_LIODN(1, "fsl-usb2-mph", 127),
- SET_USB_LIODN(2, "fsl-usb2-dr", 157),
-
- SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 1, 193),
- SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 2, 194),
-
- SET_DMA_LIODN(1, 196),
- SET_DMA_LIODN(2, 197),
-
- SET_GUTS_LIODN("fsl,srio-rmu", 200, rmuliodnr, 0xd3000),
-
-#ifdef CONFIG_SYS_DPAA_QBMAN
- SET_QMAN_LIODN(31),
- SET_BMAN_LIODN(32),
-#endif
- SET_PME_LIODN(128),
-};
-int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
-
-#ifdef CONFIG_SYS_DPAA_FMAN
-struct liodn_id_table fman1_liodn_tbl[] = {
- SET_FMAN_RX_1G_LIODN(1, 0, 11),
- SET_FMAN_RX_1G_LIODN(1, 1, 12),
- SET_FMAN_RX_1G_LIODN(1, 2, 13),
- SET_FMAN_RX_1G_LIODN(1, 3, 14),
-};
-int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);
-
-#if (CONFIG_SYS_NUM_FMAN == 2)
-struct liodn_id_table fman2_liodn_tbl[] = {
- SET_FMAN_RX_1G_LIODN(2, 0, 16),
- SET_FMAN_RX_1G_LIODN(2, 1, 17),
- SET_FMAN_RX_1G_LIODN(2, 2, 18),
- SET_FMAN_RX_1G_LIODN(2, 3, 19),
-};
-int fman2_liodn_tbl_sz = ARRAY_SIZE(fman2_liodn_tbl);
-#endif
-#endif
-
-struct liodn_id_table sec_liodn_tbl[] = {
- SET_SEC_JR_LIODN_ENTRY(0, 146, 154),
- SET_SEC_JR_LIODN_ENTRY(1, 147, 155),
- SET_SEC_JR_LIODN_ENTRY(2, 178, 186),
- SET_SEC_JR_LIODN_ENTRY(3, 179, 187),
- SET_SEC_RTIC_LIODN_ENTRY(a, 144),
- SET_SEC_RTIC_LIODN_ENTRY(b, 145),
- SET_SEC_RTIC_LIODN_ENTRY(c, 176),
- SET_SEC_RTIC_LIODN_ENTRY(d, 177),
- SET_SEC_DECO_LIODN_ENTRY(0, 129, 161),
- SET_SEC_DECO_LIODN_ENTRY(1, 130, 162),
- SET_SEC_DECO_LIODN_ENTRY(2, 131, 163),
- SET_SEC_DECO_LIODN_ENTRY(3, 132, 164),
- SET_SEC_DECO_LIODN_ENTRY(4, 133, 165),
-};
-int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);
-
-struct liodn_id_table liodn_bases[] = {
- [FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(96, 106),
-#ifdef CONFIG_SYS_DPAA_FMAN
- [FSL_HW_PORTAL_FMAN1] = SET_LIODN_BASE_1(32),
-#if (CONFIG_SYS_NUM_FMAN == 2)
- [FSL_HW_PORTAL_FMAN2] = SET_LIODN_BASE_1(64),
-#endif
-#endif
-#ifdef CONFIG_SYS_DPAA_PME
- [FSL_HW_PORTAL_PME] = SET_LIODN_BASE_2(116, 133),
-#endif
-};
diff --git a/arch/powerpc/cpu/mpc85xx/p3060_serdes.c b/arch/powerpc/cpu/mpc85xx/p3060_serdes.c
deleted file mode 100644
index e720dcf6bd..0000000000
--- a/arch/powerpc/cpu/mpc85xx/p3060_serdes.c
+++ /dev/null
@@ -1,118 +0,0 @@
-/*
- * Copyright 2011 Freescale Semiconductor, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/fsl_serdes.h>
-#include <asm/processor.h>
-#include <asm/io.h>
-#include "fsl_corenet_serdes.h"
-
-static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {
- [0x03] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2,
- SGMII_FM2_DTSEC4, SGMII_FM1_DTSEC4, SGMII_FM2_DTSEC1,
- SGMII_FM1_DTSEC1, SGMII_FM2_DTSEC2, SGMII_FM1_DTSEC2,
- NONE, NONE, AURORA, AURORA},
- [0x06] = {PCIE1, PCIE1, PCIE1, PCIE1, NONE, NONE, SGMII_FM2_DTSEC3,
- SGMII_FM1_DTSEC3, SGMII_FM2_DTSEC4, SGMII_FM1_DTSEC4,
- SGMII_FM2_DTSEC1, SGMII_FM1_DTSEC1, SGMII_FM2_DTSEC2,
- SGMII_FM1_DTSEC2, NONE, NONE, AURORA, AURORA},
- [0x16] = {SRIO2, SRIO2, SRIO2, SRIO2, SRIO1, SRIO1, SRIO1, SRIO1,
- AURORA, AURORA, SGMII_FM2_DTSEC1, SGMII_FM1_DTSEC1,
- SGMII_FM2_DTSEC2, SGMII_FM1_DTSEC2, SGMII_FM2_DTSEC3,
- SGMII_FM1_DTSEC3, SGMII_FM2_DTSEC4, SGMII_FM1_DTSEC4},
- [0x19] = {SRIO2, SRIO2, SRIO2, SRIO2, SRIO1, SRIO1, SRIO1, SRIO1,
- AURORA, AURORA, PCIE2, PCIE2, PCIE2, PCIE2, SGMII_FM2_DTSEC3,
- SGMII_FM1_DTSEC3, SGMII_FM2_DTSEC4, SGMII_FM1_DTSEC4},
- [0x1c] = {NONE, NONE, SRIO1, SRIO2, NONE, NONE, NONE, NONE,
- AURORA, AURORA, SGMII_FM2_DTSEC1, SGMII_FM1_DTSEC1,
- SGMII_FM2_DTSEC2, SGMII_FM1_DTSEC2, SGMII_FM2_DTSEC3,
- SGMII_FM1_DTSEC3, SGMII_FM2_DTSEC4, SGMII_FM1_DTSEC4},
-};
-
-enum srds_prtcl serdes_get_prtcl(int cfg, int lane)
-{
- if (!serdes_lane_enabled(lane))
- return NONE;
-
- return serdes_cfg_tbl[cfg][lane];
-}
-
-int is_serdes_prtcl_valid(u32 prtcl)
-{
- int i;
-
- if (prtcl > ARRAY_SIZE(serdes_cfg_tbl))
- return 0;
-
- for (i = 0; i < SRDS_MAX_LANES; i++) {
- if (serdes_cfg_tbl[prtcl][i] != NONE)
- return 1;
- }
-
- return 0;
-}
-
-void soc_serdes_init(void)
-{
- /*
- * On the P3060 the devdisr2 register does not correctly reflect
- * the state of the MACs based on the RCW fields. So disable the MACs
- * based on the srds_prtcl and ec1, ec2, ec3 fields
- */
-
- ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
- u32 devdisr2 = in_be32(&gur->devdisr2);
- u32 rcwsr11 = in_be32(&gur->rcwsr[11]);
-
- /* NOTE: Leave FM1-1,FM1-2 alone for MDIO access */
-
- if (!is_serdes_configured(SGMII_FM1_DTSEC3))
- devdisr2 |= FSL_CORENET_DEVDISR2_DTSEC1_3;
-
- if (!is_serdes_configured(SGMII_FM1_DTSEC4))
- devdisr2 |= FSL_CORENET_DEVDISR2_DTSEC1_4;
-
- if (!is_serdes_configured(SGMII_FM2_DTSEC1))
- devdisr2 |= FSL_CORENET_DEVDISR2_DTSEC2_1;
-
- if (!is_serdes_configured(SGMII_FM2_DTSEC2))
- devdisr2 |= FSL_CORENET_DEVDISR2_DTSEC2_2;
-
- if (!is_serdes_configured(SGMII_FM2_DTSEC3))
- devdisr2 |= FSL_CORENET_DEVDISR2_DTSEC2_3;
-
- if (!is_serdes_configured(SGMII_FM2_DTSEC4))
- devdisr2 |= FSL_CORENET_DEVDISR2_DTSEC2_4;
-
- if ((rcwsr11 & FSL_CORENET_RCWSR11_EC2) ==
- FSL_CORENET_RCWSR11_EC2_FM1_DTSEC2) {
- devdisr2 &= ~FSL_CORENET_DEVDISR2_DTSEC1_2;
- }
-
- if ((rcwsr11 & FSL_CORENET_RCWSR11_EC2) ==
- FSL_CORENET_RCWSR11_EC2_FM2_DTSEC1) {
- devdisr2 &= ~FSL_CORENET_DEVDISR2_DTSEC2_1;
- }
-
- out_be32(&gur->devdisr2, devdisr2);
-}
diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index 1c615d0b55..6cc5c4bcbb 100644
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -69,7 +69,6 @@ struct cpu_type cpu_type_list [] = {
CPU_TYPE_ENTRY(P2040, P2040, 4),
CPU_TYPE_ENTRY(P2041, P2041, 4),
CPU_TYPE_ENTRY(P3041, P3041, 4),
- CPU_TYPE_ENTRY_MASK(P3060, P3060, 6, 0xf3),
CPU_TYPE_ENTRY(P4040, P4040, 4),
CPU_TYPE_ENTRY(P4080, P4080, 8),
CPU_TYPE_ENTRY(P5010, P5010, 1),
generated by cgit (git 2.34.1) at 2024-12-27 09:45:12 +0000