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-rw-r--r--arch/powerpc/cpu/mpc512x/cpu.c2
-rw-r--r--arch/powerpc/cpu/mpc512x/cpu_init.c2
-rw-r--r--arch/powerpc/cpu/mpc8260/cpu_init.c4
-rw-r--r--arch/powerpc/cpu/mpc83xx/cpu_init.c4
4 files changed, 6 insertions, 6 deletions
diff --git a/arch/powerpc/cpu/mpc512x/cpu.c b/arch/powerpc/cpu/mpc512x/cpu.c
index 641120f0c4..bb03c6d885 100644
--- a/arch/powerpc/cpu/mpc512x/cpu.c
+++ b/arch/powerpc/cpu/mpc512x/cpu.c
@@ -69,7 +69,7 @@ int checkcpu (void)
printf ("at %s MHz, CSB at %s MHz (RSR=0x%04lx)\n",
strmhz(buf1, clock),
strmhz(buf2, gd->arch.csb_clk),
- gd->reset_status & 0xffff);
+ gd->arch.reset_status & 0xffff);
return 0;
}
diff --git a/arch/powerpc/cpu/mpc512x/cpu_init.c b/arch/powerpc/cpu/mpc512x/cpu_init.c
index fe6beaf84d..32ade1b0b9 100644
--- a/arch/powerpc/cpu/mpc512x/cpu_init.c
+++ b/arch/powerpc/cpu/mpc512x/cpu_init.c
@@ -62,7 +62,7 @@ void cpu_init_f (volatile immap_t * im)
#endif
/* RSR - Reset Status Register - clear all status */
- gd->reset_status = im->reset.rsr;
+ gd->arch.reset_status = im->reset.rsr;
out_be32(&im->reset.rsr, ~RSR_RES);
/*
diff --git a/arch/powerpc/cpu/mpc8260/cpu_init.c b/arch/powerpc/cpu/mpc8260/cpu_init.c
index acd48a9f55..3964e607d0 100644
--- a/arch/powerpc/cpu/mpc8260/cpu_init.c
+++ b/arch/powerpc/cpu/mpc8260/cpu_init.c
@@ -120,7 +120,7 @@ void cpu_init_f (volatile immap_t * immr)
memset ((void *) gd, 0, sizeof (gd_t));
/* RSR - Reset Status Register - clear all status (5-4) */
- gd->reset_status = immr->im_clkrst.car_rsr;
+ gd->arch.reset_status = immr->im_clkrst.car_rsr;
immr->im_clkrst.car_rsr = RSR_ALLBITS;
/* RMR - Reset Mode Register - contains checkstop reset enable (5-5) */
@@ -274,7 +274,7 @@ int prt_8260_rsr (void)
RSR_EHRS, "External Hard"}
};
static int n = sizeof bits / sizeof bits[0];
- ulong rsr = gd->reset_status;
+ ulong rsr = gd->arch.reset_status;
int i;
char *sep;
diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index 20d06003e5..9325110fea 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -232,7 +232,7 @@ void cpu_init_f (volatile immap_t * im)
clrsetbits_be32(&im->clk.sccr, sccr_mask, sccr_val);
/* RSR - Reset Status Register - clear all status (4.6.1.3) */
- gd->reset_status = __raw_readl(&im->reset.rsr);
+ gd->arch.reset_status = __raw_readl(&im->reset.rsr);
__raw_writel(~(RSR_RES), &im->reset.rsr);
/* AER - Arbiter Event Register - store status */
@@ -499,7 +499,7 @@ int prt_83xx_rsr(void)
RSR_HRS, "External/Internal Hard"}
};
static int n = sizeof bits / sizeof bits[0];
- ulong rsr = gd->reset_status;
+ ulong rsr = gd->arch.reset_status;
int i;
char *sep;