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-rw-r--r--arch/powerpc/cpu/mpc5xxx/spl_boot.c2
-rw-r--r--arch/powerpc/cpu/mpc85xx/cpu.c4
-rw-r--r--arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c4
-rw-r--r--arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c2
-rw-r--r--arch/powerpc/cpu/ppc4xx/sdram.c4
-rw-r--r--arch/powerpc/cpu/ppc4xx/spl_boot.c2
6 files changed, 9 insertions, 9 deletions
diff --git a/arch/powerpc/cpu/mpc5xxx/spl_boot.c b/arch/powerpc/cpu/mpc5xxx/spl_boot.c
index e182dfbd45..23d2010343 100644
--- a/arch/powerpc/cpu/mpc5xxx/spl_boot.c
+++ b/arch/powerpc/cpu/mpc5xxx/spl_boot.c
@@ -62,7 +62,7 @@ void board_init_f(ulong bootflag)
* First we need to initialize the SDRAM, so that the real
* U-Boot or the OS (Linux) can be loaded
*/
- initdram(0);
+ initdram();
/* Clear bss */
memset(__bss_start, '\0', __bss_end - __bss_start);
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index cc30fa6e17..192634d41c 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -401,7 +401,7 @@ void mpc85xx_reginfo(void)
#ifndef CONFIG_FSL_CORENET
#if (defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL)) && \
!defined(CONFIG_SYS_INIT_L2_ADDR)
-phys_size_t initdram(int board_type)
+phys_size_t initdram(void)
{
#if defined(CONFIG_SPD_EEPROM) || defined(CONFIG_DDR_SPD) || \
defined(CONFIG_ARCH_QEMU_E500)
@@ -411,7 +411,7 @@ phys_size_t initdram(int board_type)
#endif
}
#else /* CONFIG_SYS_RAMBOOT */
-phys_size_t initdram(int board_type)
+phys_size_t initdram(void)
{
phys_size_t dram_size = 0;
diff --git a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
index 7202c3fc46..3b79efb246 100644
--- a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
+++ b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
@@ -414,7 +414,7 @@ static unsigned char spd_read(uchar chip, uint addr)
* banks appropriately. If Auto Memory Configuration is
* not used, it is assumed that no DIMM is plugged
*-----------------------------------------------------------------------------*/
-phys_size_t initdram(int board_type)
+phys_size_t initdram(void)
{
unsigned char iic0_dimm_addr[] = SPD_EEPROM_ADDRESS;
unsigned long dimm_populated[MAXDIMMS] = {SDRAM_NONE, SDRAM_NONE};
@@ -2855,7 +2855,7 @@ static void test(void)
* time parameters.
* Configures the PPC405EX(r) and PPC460EX/GT
*---------------------------------------------------------------------------*/
-phys_size_t initdram(int board_type)
+phys_size_t initdram(void)
{
unsigned long val;
diff --git a/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c
index 455136c68c..3b072b7791 100644
--- a/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c
+++ b/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c
@@ -998,7 +998,7 @@ static void program_ddr0_44(unsigned long dimm_ranks[],
* banks appropriately. If Auto Memory Configuration is
* not used, it is assumed that no DIMM is plugged
*-----------------------------------------------------------------------------*/
-phys_size_t initdram(int board_type)
+phys_size_t initdram(void)
{
unsigned char const iic0_dimm_addr[] = SPD_EEPROM_ADDRESS;
unsigned long dimm_ranks[MAXDIMMS];
diff --git a/arch/powerpc/cpu/ppc4xx/sdram.c b/arch/powerpc/cpu/ppc4xx/sdram.c
index cd63456e70..2d805717a7 100644
--- a/arch/powerpc/cpu/ppc4xx/sdram.c
+++ b/arch/powerpc/cpu/ppc4xx/sdram.c
@@ -148,7 +148,7 @@ static ulong compute_rtr(ulong speed, ulong rows, ulong refresh)
/*
* Autodetect onboard SDRAM on 405 platforms
*/
-phys_size_t initdram(int board_type)
+phys_size_t initdram(void)
{
ulong speed;
ulong sdtr1;
@@ -349,7 +349,7 @@ static void sdram_tr1_set(int ram_address, int* tr1_value)
* so this should be extended for other future boards
* using this routine!
*/
-phys_size_t initdram(int board_type)
+phys_size_t initdram(void)
{
int i;
int tr1_bank1;
diff --git a/arch/powerpc/cpu/ppc4xx/spl_boot.c b/arch/powerpc/cpu/ppc4xx/spl_boot.c
index 318f23b646..f3aa46c4f1 100644
--- a/arch/powerpc/cpu/ppc4xx/spl_boot.c
+++ b/arch/powerpc/cpu/ppc4xx/spl_boot.c
@@ -26,7 +26,7 @@ void board_init_f(ulong bootflag)
* First we need to initialize the SDRAM, so that the real
* U-Boot or the OS (Linux) can be loaded
*/
- initdram(0);
+ initdram();
/* Clear bss */
memset(__bss_start, '\0', __bss_end - __bss_start);