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-rw-r--r--arch/powerpc/include/asm/cache.h32
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index d3a83910b6..0801d2c367 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -107,6 +107,38 @@ void disable_cpc_sram(void);
#define DC_DFWT 0x40000000 /* Data cache is forced write through */
#define DC_LES 0x20000000 /* Caches are little endian mode */
+
+#if !defined(__ASSEMBLY__)
+static inline uint rd_ic_cst(void)
+{
+ return mfspr(IC_CST);
+}
+
+static inline void wr_ic_cst(uint val)
+{
+ mtspr(IC_CST, val);
+}
+
+static inline void wr_ic_adr(uint val)
+{
+ mtspr(IC_ADR, val);
+}
+
+static inline uint rd_dc_cst(void)
+{
+ return mfspr(DC_CST);
+}
+
+static inline void wr_dc_cst(uint val)
+{
+ mtspr(DC_CST, val);
+}
+
+static inline void wr_dc_adr(uint val)
+{
+ mtspr(DC_ADR, val);
+}
+#endif
#endif /* CONFIG_8xx */
#endif