diff options
Diffstat (limited to 'arch/powerpc/include')
| -rw-r--r-- | arch/powerpc/include/asm/config_mpc85xx.h | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index dbc8d7a5b1..4986f38f08 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -156,7 +156,6 @@ #define CONFIG_SYS_NUM_FMAN 1 #define CONFIG_SYS_NUM_FM1_DTSEC 5 #define CONFIG_SYS_NUM_FM1_10GEC 1 -#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_5 #define CONFIG_SYS_FM_MURAM_SIZE 0x28000 #define CONFIG_SYS_FSL_TBCLK_DIV 32 #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" @@ -178,7 +177,6 @@ #define CONFIG_SYS_NUM_FM2_DTSEC 4 #define CONFIG_SYS_NUM_FM1_10GEC 1 #define CONFIG_SYS_NUM_FM2_10GEC 1 -#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_4 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_SYS_FM_MURAM_SIZE 0x28000 #define CONFIG_SYS_FSL_TBCLK_DIV 16 @@ -198,7 +196,6 @@ #define CONFIG_SYS_NUM_FMAN 1 #define CONFIG_SYS_NUM_FM1_DTSEC 5 #define CONFIG_SYS_NUM_FM1_10GEC 1 -#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_4 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_SYS_FM_MURAM_SIZE 0x28000 #define CONFIG_SYS_FSL_TBCLK_DIV 32 @@ -221,7 +218,6 @@ #define CONFIG_SYS_NUM_FM1_10GEC 1 #define CONFIG_SYS_NUM_FM2_DTSEC 5 #define CONFIG_SYS_NUM_FM2_10GEC 1 -#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_4 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_SYS_FM_MURAM_SIZE 0x28000 #define CONFIG_SYS_FSL_TBCLK_DIV 16 @@ -234,7 +230,6 @@ #elif defined(CONFIG_ARCH_BSC9131) #define CONFIG_FSL_SDHC_V2_3 #define CONFIG_TSECV2 -#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_4 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_SYS_FSL_DSP_M2_RAM_ADDR 0xb0000000 #define CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT 0xff600000 @@ -245,7 +240,6 @@ #elif defined(CONFIG_ARCH_BSC9132) #define CONFIG_FSL_SDHC_V2_3 #define CONFIG_TSECV2 -#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_6 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_SYS_FSL_DSP_DDR_ADDR 0x40000000 #define CONFIG_SYS_FSL_DSP_M2_RAM_ADDR 0xb0000000 @@ -287,7 +281,6 @@ #define CONFIG_SYS_NUM_FMAN 2 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_SYS_PME_CLK 0 -#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_7 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CONFIG_SYS_FMAN_V3 #define CONFIG_SYS_FM1_CLK 3 @@ -324,7 +317,6 @@ #define CONFIG_SYS_CPRI_CLK 3 #define CONFIG_SYS_ULB_CLK 4 #define CONFIG_SYS_ETVPE_CLK 1 -#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_7 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 4 #define CONFIG_SYS_FMAN_V3 #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 @@ -369,7 +361,6 @@ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_PME_PLAT_CLK_DIV 2 #define CONFIG_SYS_PME_CLK CONFIG_PME_PLAT_CLK_DIV -#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CONFIG_SYS_FMAN_V3 #define CONFIG_FM_PLAT_CLK_DIV 1 @@ -404,7 +395,6 @@ #define CONFIG_SYS_NUM_FM1_10GEC 1 #define CONFIG_FSL_FM_10GEC_REGULAR_NOTATION #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CONFIG_SYS_FM1_CLK 0 #define CONFIG_SYS_SDHC_CLK 0/* Select SDHC CLK begining from PLL1 @@ -453,7 +443,6 @@ #define CONFIG_SYS_SDHC_CLK 1/* Select SDHC CLK begining from PLL2 per rcw field value */ #define CONFIG_SYS_SDHC_CLK_2_PLL /* Select SDHC CLK from 2 PLLs */ -#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_7 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CONFIG_SYS_FMAN_V3 #define CONFIG_SYS_FM_MURAM_SIZE 0x28000 @@ -470,7 +459,6 @@ #elif defined(CONFIG_ARCH_C29X) #define CONFIG_FSL_SDHC_V2_3 #define CONFIG_TSECV2_1 -#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_6 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 3 #define CONFIG_SYS_FSL_SEC_IDX_OFFSET 0x20000 |