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Diffstat (limited to 'arch/x86/cpu/qemu/qemu.c')
-rw-r--r--arch/x86/cpu/qemu/qemu.c39
1 files changed, 38 insertions, 1 deletions
diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index 32a4351874..6ff99474bf 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -15,6 +15,43 @@
static bool i440fx;
+#ifdef CONFIG_QFW
+
+#define FW_CONTROL_PORT 0x510
+#define FW_DATA_PORT 0x511
+#define FW_DMA_PORT_LOW 0x514
+#define FW_DMA_PORT_HIGH 0x518
+
+static void qemu_x86_fwcfg_read_entry_pio(uint16_t entry,
+ uint32_t size, void *address)
+{
+ uint32_t i = 0;
+ uint8_t *data = address;
+
+ /*
+ * writting FW_CFG_INVALID will cause read operation to resume at
+ * last offset, otherwise read will start at offset 0
+ */
+ if (entry != FW_CFG_INVALID)
+ outw(entry, FW_CONTROL_PORT);
+ while (size--)
+ data[i++] = inb(FW_DATA_PORT);
+}
+
+static void qemu_x86_fwcfg_read_entry_dma(struct fw_cfg_dma_access *dma)
+{
+ outl(cpu_to_be32((uint32_t)dma), FW_DMA_PORT_HIGH);
+
+ while (be32_to_cpu(dma->control) & ~FW_CFG_DMA_ERROR)
+ __asm__ __volatile__ ("pause");
+}
+
+static struct fw_cfg_arch_ops fwcfg_x86_ops = {
+ .arch_read_pio = qemu_x86_fwcfg_read_entry_pio,
+ .arch_read_dma = qemu_x86_fwcfg_read_entry_dma
+};
+#endif
+
static void enable_pm_piix(void)
{
u8 en;
@@ -89,7 +126,7 @@ static void qemu_chipset_init(void)
}
#ifdef CONFIG_QFW
- qemu_fwcfg_init();
+ qemu_fwcfg_init(&fwcfg_x86_ops);
#endif
}