summaryrefslogtreecommitdiff
path: root/arch/x86/cpu
diff options
context:
space:
mode:
Diffstat (limited to 'arch/x86/cpu')
-rw-r--r--arch/x86/cpu/broadwell/sdram.c8
-rw-r--r--arch/x86/cpu/ivybridge/sdram.c8
-rw-r--r--arch/x86/cpu/quark/dram.c8
3 files changed, 15 insertions, 9 deletions
diff --git a/arch/x86/cpu/broadwell/sdram.c b/arch/x86/cpu/broadwell/sdram.c
index dfd8afc35f..15bfc5811c 100644
--- a/arch/x86/cpu/broadwell/sdram.c
+++ b/arch/x86/cpu/broadwell/sdram.c
@@ -83,7 +83,7 @@ static int prepare_mrc_cache(struct pei_data *pei_data)
struct mrc_region entry;
int ret;
- ret = mrccache_get_region(NULL, &entry);
+ ret = mrccache_get_region(MRC_TYPE_NORMAL, NULL, &entry);
if (ret)
return ret;
mrc_cache = mrccache_find_current(&entry);
@@ -169,12 +169,14 @@ int dram_init(void)
pei_data->data_to_save);
/* S3 resume: don't save scrambler seed or MRC data */
if (pei_data->boot_mode != SLEEP_STATE_S3) {
+ struct mrc_output *mrc = &gd->arch.mrc[MRC_TYPE_NORMAL];
+
/*
* This will be copied to SDRAM in reserve_arch(), then written
* to SPI flash in mrccache_save()
*/
- gd->arch.mrc_output = (char *)pei_data->data_to_save;
- gd->arch.mrc_output_len = pei_data->data_to_save_size;
+ mrc->buf = (char *)pei_data->data_to_save;
+ mrc->len = pei_data->data_to_save_size;
}
gd->arch.pei_meminfo = pei_data->meminfo;
diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c
index 51ca4ad301..cf34f94a91 100644
--- a/arch/x86/cpu/ivybridge/sdram.c
+++ b/arch/x86/cpu/ivybridge/sdram.c
@@ -116,7 +116,7 @@ static int prepare_mrc_cache(struct pei_data *pei_data)
ret = read_seed_from_cmos(pei_data);
if (ret)
return ret;
- ret = mrccache_get_region(NULL, &entry);
+ ret = mrccache_get_region(MRC_TYPE_NORMAL, NULL, &entry);
if (ret)
return ret;
mrc_cache = mrccache_find_current(&entry);
@@ -538,12 +538,14 @@ int dram_init(void)
/* S3 resume: don't save scrambler seed or MRC data */
if (pei_data->boot_mode != PEI_BOOT_RESUME) {
+ struct mrc_output *mrc = &gd->arch.mrc[MRC_TYPE_NORMAL];
+
/*
* This will be copied to SDRAM in reserve_arch(), then written
* to SPI flash in mrccache_save()
*/
- gd->arch.mrc_output = (char *)pei_data->mrc_output;
- gd->arch.mrc_output_len = pei_data->mrc_output_len;
+ mrc->buf = (char *)pei_data->mrc_output;
+ mrc->len = pei_data->mrc_output_len;
ret = write_seeds_to_cmos(pei_data);
if (ret)
debug("Failed to write seeds to CMOS: %d\n", ret);
diff --git a/arch/x86/cpu/quark/dram.c b/arch/x86/cpu/quark/dram.c
index 995e119fb6..2bf90dcfc6 100644
--- a/arch/x86/cpu/quark/dram.c
+++ b/arch/x86/cpu/quark/dram.c
@@ -24,7 +24,7 @@ static __maybe_unused int prepare_mrc_cache(struct mrc_params *mrc_params)
struct mrc_region entry;
int ret;
- ret = mrccache_get_region(NULL, &entry);
+ ret = mrccache_get_region(MRC_TYPE_NORMAL, NULL, &entry);
if (ret)
return ret;
@@ -154,9 +154,11 @@ int dram_init(void)
#ifdef CONFIG_ENABLE_MRC_CACHE
cache = malloc(sizeof(struct mrc_timings));
if (cache) {
+ struct mrc_output *mrc = &gd->arch.mrc[MRC_TYPE_NORMAL];
+
memcpy(cache, &mrc_params.timings, sizeof(struct mrc_timings));
- gd->arch.mrc_output = cache;
- gd->arch.mrc_output_len = sizeof(struct mrc_timings);
+ mrc->buf = cache;
+ mrc->len = sizeof(struct mrc_timings);
}
#endif