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-rw-r--r--arch/x86/cpu/apollolake/fsp_bindings.c51
-rw-r--r--arch/x86/cpu/call32.S5
-rw-r--r--arch/x86/cpu/sipi_vector.S6
3 files changed, 56 insertions, 6 deletions
diff --git a/arch/x86/cpu/apollolake/fsp_bindings.c b/arch/x86/cpu/apollolake/fsp_bindings.c
index 9130af9ce0..bbf04b5009 100644
--- a/arch/x86/cpu/apollolake/fsp_bindings.c
+++ b/arch/x86/cpu/apollolake/fsp_bindings.c
@@ -90,6 +90,28 @@ static void read_u32_prop(ofnode node, char *name, size_t count, u32 *dst)
}
/**
+ * read_u64_prop() - Read an u64 property from devicetree (scalar or array)
+ * @node: Valid node reference to read property from
+ * @name: Name of the property to read from
+ * @count: If the property is expected to be an array, this is the
+ * number of expected elements
+ * set to 0 if the property is expected to be a scalar
+ * @dst: Pointer to destination of where to save the value(s) read
+ * from devicetree
+ */
+static int read_u64_prop(ofnode node, char *name, size_t count, u64 *dst)
+{
+ if (count == 0) {
+ ofnode_read_u64(node, name, dst);
+ } else {
+ debug("ERROR: %s u64 arrays not supported!\n", __func__);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+/**
* read_string_prop() - Read a string property from devicetree
* @node: Valid node reference to read property from
* @name: Name of the property to read from
@@ -206,6 +228,12 @@ static int fsp_update_config_from_dtb(ofnode node, u8 *cfg,
read_u32_prop(node, fspb->propname, fspb->count,
(u32 *)&cfg[fspb->offset]);
break;
+ case FSP_UINT64:
+ ret = read_u64_prop(node, fspb->propname, fspb->count,
+ (u64 *)&cfg[fspb->offset]);
+ if (ret)
+ return ret;
+ break;
case FSP_STRING:
read_string_prop(node, fspb->propname, fspb->count,
(char *)&cfg[fspb->offset]);
@@ -605,6 +633,17 @@ const struct fsp_binding fsp_m_bindings[] = {
.offset = offsetof(struct fsp_m_config, variable_nvs_buffer_ptr),
.propname = "fspm,variable-nvs-buffer-ptr",
}, {
+ .type = FSP_UINT64,
+ .offset = offsetof(struct fsp_m_config, start_timer_ticker_of_pfet_assert),
+ .propname = "fspm,start-timer-ticker-of-pfet-assert",
+ }, {
+ .type = FSP_UINT8, .offset = offsetof(struct fsp_m_config, rt_en),
+ .propname = "fspm,rt-en",
+ }, {
+ .type = FSP_UINT8,
+ .offset = offsetof(struct fsp_m_config, skip_pcie_power_sequence),
+ .propname = "fspm,skip-pcie-power-sequence",
+ }, {
.propname = NULL
}
};
@@ -1794,6 +1833,18 @@ const struct fsp_binding fsp_s_bindings[] = {
.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
port_usb20_hs_npre_drv_sel),
}, {
+ .type = FSP_UINT8,
+ .offset = offsetof(struct fsp_s_config, os_selection),
+ .propname = "fsps,os-selection",
+ }, {
+ .type = FSP_UINT8,
+ .offset = offsetof(struct fsp_s_config, dptf_enabled),
+ .propname = "fsps,dptf-enabled",
+ }, {
+ .type = FSP_UINT8,
+ .offset = offsetof(struct fsp_s_config, pwm_enabled),
+ .propname = "fsps,pwm-enabled",
+ }, {
.propname = NULL
}
};
diff --git a/arch/x86/cpu/call32.S b/arch/x86/cpu/call32.S
index e185b9a42b..e641e781c0 100644
--- a/arch/x86/cpu/call32.S
+++ b/arch/x86/cpu/call32.S
@@ -32,8 +32,7 @@ cpu_call32:
push %rdi /* 32-bit code segment */
lea compat(%rip), %rax
push %rax
- .byte 0x48 /* REX prefix to force 64-bit far return */
- retf
+ retfq
.code32
compat:
/*
@@ -60,4 +59,4 @@ compat:
/* Jump to the required target */
pushl %edi /* 32-bit code segment */
pushl %esi /* 32-bit target address */
- retf
+ retfl
diff --git a/arch/x86/cpu/sipi_vector.S b/arch/x86/cpu/sipi_vector.S
index 40cc27f1e1..fa1e6cb19a 100644
--- a/arch/x86/cpu/sipi_vector.S
+++ b/arch/x86/cpu/sipi_vector.S
@@ -131,12 +131,12 @@ ap_start:
jnz microcode_done
/* Determine if parallel microcode loading is allowed */
- cmp $0xffffffff, microcode_lock
+ cmpl $0xffffffff, microcode_lock
je load_microcode
/* Protect microcode loading */
lock_microcode:
- lock bts $0, microcode_lock
+ lock btsl $0, microcode_lock
jc lock_microcode
load_microcode:
@@ -154,7 +154,7 @@ load_microcode:
popa
/* Unconditionally unlock microcode loading */
- cmp $0xffffffff, microcode_lock
+ cmpl $0xffffffff, microcode_lock
je microcode_done
xor %eax, %eax