diff options
Diffstat (limited to 'arch/x86/include/asm/arch-baytrail/acpi')
| -rw-r--r-- | arch/x86/include/asm/arch-baytrail/acpi/global_nvs.asl | 15 | ||||
| -rw-r--r-- | arch/x86/include/asm/arch-baytrail/acpi/lpc.asl | 19 | ||||
| -rw-r--r-- | arch/x86/include/asm/arch-baytrail/acpi/platform.asl | 3 |
3 files changed, 26 insertions, 11 deletions
diff --git a/arch/x86/include/asm/arch-baytrail/acpi/global_nvs.asl b/arch/x86/include/asm/arch-baytrail/acpi/global_nvs.asl new file mode 100644 index 0000000000..a28d4dfade --- /dev/null +++ b/arch/x86/include/asm/arch-baytrail/acpi/global_nvs.asl @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/acpi/global_nvs.h> + +OperationRegion(GNVS, SystemMemory, ACPI_GNVS_ADDR, ACPI_GNVS_SIZE) +Field(GNVS, ByteAcc, NoLock, Preserve) +{ + Offset (0x00), + PCNT, 8, /* processor count */ + IURE, 8, /* internal UART enabled */ +} diff --git a/arch/x86/include/asm/arch-baytrail/acpi/lpc.asl b/arch/x86/include/asm/arch-baytrail/acpi/lpc.asl index 22f0d68f4d..fe34d3271c 100644 --- a/arch/x86/include/asm/arch-baytrail/acpi/lpc.asl +++ b/arch/x86/include/asm/arch-baytrail/acpi/lpc.asl @@ -119,17 +119,14 @@ Device (LPCB) Method(_STA, 0, Serialized) { - /* - * TODO: - * - * Need to hide the internal UART depending on whether - * internal UART is enabled or not so that external - * SuperIO UART can be exposed to system. - */ - Store(1, UI3E) - Store(1, UI4E) - Store(1, C1EN) - Return (STA_VISIBLE) + If (LEqual(IURE, 1)) { + Store(1, UI3E) + Store(1, UI4E) + Store(1, C1EN) + Return (STA_VISIBLE) + } Else { + Return (STA_MISSING) + } } diff --git a/arch/x86/include/asm/arch-baytrail/acpi/platform.asl b/arch/x86/include/asm/arch-baytrail/acpi/platform.asl index 6bc82ecfe1..a80d2c0e51 100644 --- a/arch/x86/include/asm/arch-baytrail/acpi/platform.asl +++ b/arch/x86/include/asm/arch-baytrail/acpi/platform.asl @@ -22,6 +22,9 @@ Method(_WAK, 1) Return (Package() {0, 0}) } +/* ACPI global NVS */ +#include "global_nvs.asl" + /* TODO: add CPU ASL support */ Scope (\_SB) |