4 files changed, 56 insertions, 15 deletions

diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig
index 392c258945..93f61f2fa4 100644
--- a/arch/x86/cpu/coreboot/Kconfig
+++ b/arch/x86/cpu/coreboot/Kconfig
@@ -3,26 +3,26 @@ if TARGET_COREBOOT
 config SYS_COREBOOT
 	bool
 	default y
+	imply SYS_NS16550
+	imply SCSI
+	imply SCSI_AHCI
 	imply AHCI_PCI
-	imply E1000
-	imply ICH_SPI
 	imply MMC
 	imply MMC_PCI
 	imply MMC_SDHCI
 	imply MMC_SDHCI_SDMA
-	imply SCSI
-	imply SCSI_AHCI
-	imply SPI_FLASH
-	imply SYS_NS16550
 	imply USB
 	imply USB_EHCI_HCD
 	imply USB_XHCI_HCD
+	imply USB_STORAGE
+	imply USB_KEYBOARD
 	imply VIDEO_COREBOOT
+	imply E1000
+	imply ETH_DESIGNWARE
+	imply PCH_GBE
+	imply RTL8169
 	imply CMD_CBFS
 	imply FS_CBFS
-
-config CBMEM_CONSOLE
-	bool
-	default y
+	imply CBMEM_CONSOLE
 
 endif
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index 69025c1537..a6fd3a849a 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <fdtdec.h>
+#include <usb.h>
 #include <asm/io.h>
 #include <asm/msr.h>
 #include <asm/mtrr.h>
@@ -75,12 +76,10 @@ int last_stage_init(void)
 	if (gd->flags & GD_FLG_COLD_BOOT)
 		timestamp_add_to_bootstage();
 
-	board_final_cleanup();
+	/* start usb so that usb keyboard can be used as input device */
+	usb_init();
 
-	return 0;
-}
+	board_final_cleanup();
 
-int misc_init_r(void)
-{
 	return 0;
 }
diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile
index 37e4fdc760..c62540fe74 100644
--- a/arch/x86/dts/Makefile
+++ b/arch/x86/dts/Makefile
@@ -6,6 +6,7 @@ dtb-y += bayleybay.dtb \
 	chromebox_panther.dtb \
 	chromebook_samus.dtb \
 	conga-qeval20-qa3-e3845.dtb \
+	coreboot.dtb \
 	cougarcanyon2.dtb \
 	crownbay.dtb \
 	dfi-bt700-q7x-151.dtb \
diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts
new file mode 100644
index 0000000000..a94f781833
--- /dev/null
+++ b/arch/x86/dts/coreboot.dts
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * Generic coreboot payload device tree for x86 targets
+ */
+
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+/include/ "serial.dtsi"
+/include/ "keyboard.dtsi"
+/include/ "reset.dtsi"
+/include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
+
+/ {
+	model = "coreboot x86 payload";
+	compatible = "coreboot,x86-payload";
+
+	aliases {
+		serial0 = &serial;
+	};
+
+	config {
+		silent_console = <0>;
+	};
+
+	chosen {
+		stdout-path = "/serial";
+	};
+
+	pci {
+		compatible = "pci-x86";
+		u-boot,dm-pre-reloc;
+	};
+
+	coreboot-fb {
+		compatible = "coreboot-fb";
+	};
+};