diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-rockchip/Kconfig | 16 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/Makefile | 5 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/rk3188/Kconfig | 24 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/rk3188/Makefile | 10 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/rk3188/clk_rk3188.c | 33 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/rk3188/syscon_rk3188.c | 55 |
6 files changed, 143 insertions, 0 deletions
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index a776df35f4..ba9fbbbd33 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -11,6 +11,21 @@ config ROCKCHIP_RK3036 and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. +config ROCKCHIP_RK3188 + bool "Support Rockchip RK3188" + select CPU_V7 + select SUPPORT_SPL + select SUPPORT_TPL + select SPL + select TPL + select ROCKCHIP_BROM_HELPER + help + The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 + including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two + video interfaces, several memory options and video codec support. + Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, + UART, SPI, I2C and PWMs. + config ROCKCHIP_RK3288 bool "Support Rockchip RK3288" select CPU_V7 @@ -50,6 +65,7 @@ config SPL_MMC_SUPPORT default y if !ROCKCHIP_SPL_BACK_TO_BROM source "arch/arm/mach-rockchip/rk3036/Kconfig" +source "arch/arm/mach-rockchip/rk3188/Kconfig" source "arch/arm/mach-rockchip/rk3288/Kconfig" source "arch/arm/mach-rockchip/rk3399/Kconfig" endif diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index f9ccc9bb2c..2be7e14e3e 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -16,5 +16,10 @@ ifndef CONFIG_ARM64 obj-y += rk_timer.o endif obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/ + +ifndef CONFIG_TPL_BUILD +obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188/ +endif + obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288/ obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/ diff --git a/arch/arm/mach-rockchip/rk3188/Kconfig b/arch/arm/mach-rockchip/rk3188/Kconfig new file mode 100644 index 0000000000..f8e1d0316b --- /dev/null +++ b/arch/arm/mach-rockchip/rk3188/Kconfig @@ -0,0 +1,24 @@ +if ROCKCHIP_RK3188 + +config SYS_SOC + default "rockchip" + +config SYS_MALLOC_F_LEN + default 0x0800 + +config SPL_LIBCOMMON_SUPPORT + default y + +config SPL_LIBGENERIC_SUPPORT + default y + +config SPL_SERIAL_SUPPORT + default y + +config TPL_LIBCOMMON_SUPPORT + default y + +config TPL_SERIAL_SUPPORT + default y + +endif diff --git a/arch/arm/mach-rockchip/rk3188/Makefile b/arch/arm/mach-rockchip/rk3188/Makefile new file mode 100644 index 0000000000..7fa010405b --- /dev/null +++ b/arch/arm/mach-rockchip/rk3188/Makefile @@ -0,0 +1,10 @@ +# +# Copyright (c) 2015 Google, Inc +# +# SPDX-License-Identifier: GPL-2.0+ +# + +ifndef CONFIG_TPL_BUILD +obj-y += clk_rk3188.o +obj-y += syscon_rk3188.o +endif diff --git a/arch/arm/mach-rockchip/rk3188/clk_rk3188.c b/arch/arm/mach-rockchip/rk3188/clk_rk3188.c new file mode 100644 index 0000000000..1ec9e1cb75 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3188/clk_rk3188.c @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2015 Google, Inc + * Written by Simon Glass <sjg@chromium.org> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <syscon.h> +#include <asm/arch/clock.h> +#include <asm/arch/cru_rk3188.h> + +int rockchip_get_clk(struct udevice **devp) +{ + return uclass_get_device_by_driver(UCLASS_CLK, + DM_GET_DRIVER(rockchip_rk3188_cru), devp); +} + +void *rockchip_get_cru(void) +{ + struct rk3188_clk_priv *priv; + struct udevice *dev; + int ret; + + ret = rockchip_get_clk(&dev); + if (ret) + return ERR_PTR(ret); + + priv = dev_get_priv(dev); + + return priv->cru; +} diff --git a/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c b/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c new file mode 100644 index 0000000000..aeee6bfcad --- /dev/null +++ b/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2015 Google, Inc + * Written by Simon Glass <sjg@chromium.org> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <syscon.h> +#include <asm/arch/clock.h> + +static const struct udevice_id rk3188_syscon_ids[] = { + { .compatible = "rockchip,rk3188-noc", .data = ROCKCHIP_SYSCON_NOC }, + { .compatible = "rockchip,rk3188-grf", .data = ROCKCHIP_SYSCON_GRF }, + { .compatible = "rockchip,rk3188-pmu", .data = ROCKCHIP_SYSCON_PMU }, + { } +}; + +U_BOOT_DRIVER(syscon_rk3188) = { + .name = "rk3188_syscon", + .id = UCLASS_SYSCON, + .of_match = rk3188_syscon_ids, +}; + +#if CONFIG_IS_ENABLED(OF_PLATDATA) +static int rk3188_syscon_bind_of_platdata(struct udevice *dev) +{ + dev->driver_data = dev->driver->of_match->data; + debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data); + + return 0; +} + +U_BOOT_DRIVER(rockchip_rk3188_noc) = { + .name = "rockchip_rk3188_noc", + .id = UCLASS_SYSCON, + .of_match = rk3188_syscon_ids, + .bind = rk3188_syscon_bind_of_platdata, +}; + +U_BOOT_DRIVER(rockchip_rk3188_grf) = { + .name = "rockchip_rk3188_grf", + .id = UCLASS_SYSCON, + .of_match = rk3188_syscon_ids + 1, + .bind = rk3188_syscon_bind_of_platdata, +}; + +U_BOOT_DRIVER(rockchip_rk3188_pmu) = { + .name = "rockchip_rk3188_pmu", + .id = UCLASS_SYSCON, + .of_match = rk3188_syscon_ids + 2, + .bind = rk3188_syscon_bind_of_platdata, +}; +#endif |