diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/Kconfig | 4 | ||||
| -rw-r--r-- | arch/arm/cpu/tegra-common/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/cpu/tegra-common/ap.c | 3 | ||||
| -rw-r--r-- | arch/arm/cpu/tegra-common/board.c | 18 | ||||
| -rw-r--r-- | arch/arm/cpu/tegra-common/vpr.c | 35 | ||||
| -rw-r--r-- | arch/arm/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/dts/tegra30-colibri.dts | 85 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra/ap.h | 9 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra124/mc.h | 49 | ||||
| -rw-r--r-- | arch/arm/include/asm/mach-types.h | 13 |
10 files changed, 217 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 17942965af..4f26d289be 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -704,6 +704,9 @@ config TARGET_WHISTLER config TARGET_COLIBRI_T20_IRIS bool "Support colibri_t20_iris" +config TARGET_COLIBRI_T30 + bool "Support Colibri T30" + config TARGET_TEC_NG bool "Support tec-ng" @@ -993,6 +996,7 @@ source "board/timll/devkit3250/Kconfig" source "board/timll/devkit8000/Kconfig" source "board/toradex/colibri_pxa270/Kconfig" source "board/toradex/colibri_t20_iris/Kconfig" +source "board/toradex/colibri_t30/Kconfig" source "board/trizepsiv/Kconfig" source "board/ttcontrol/vision2/Kconfig" source "board/udoo/Kconfig" diff --git a/arch/arm/cpu/tegra-common/Makefile b/arch/arm/cpu/tegra-common/Makefile index 892556e644..a18c318739 100644 --- a/arch/arm/cpu/tegra-common/Makefile +++ b/arch/arm/cpu/tegra-common/Makefile @@ -14,3 +14,4 @@ obj-y += clock.o obj-y += lowlevel_init.o obj-y += pinmux-common.o obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o +obj-$(CONFIG_TEGRA124) += vpr.o diff --git a/arch/arm/cpu/tegra-common/ap.c b/arch/arm/cpu/tegra-common/ap.c index 91d70da656..a17dfd1e22 100644 --- a/arch/arm/cpu/tegra-common/ap.c +++ b/arch/arm/cpu/tegra-common/ap.c @@ -163,4 +163,7 @@ void s_init(void) /* init the cache */ config_cache(); + + /* init vpr */ + config_vpr(); } diff --git a/arch/arm/cpu/tegra-common/board.c b/arch/arm/cpu/tegra-common/board.c index 6a6faf4b27..433da09d10 100644 --- a/arch/arm/cpu/tegra-common/board.c +++ b/arch/arm/cpu/tegra-common/board.c @@ -27,11 +27,12 @@ enum { UART_COUNT = 5, }; +#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \ + defined(CONFIG_TEGRA114) /* * Boot ROM initializes the odmdata in APBDEV_PMC_SCRATCH20_0, * so we are using this value to identify memory size. */ - unsigned int query_sdram_size(void) { struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; @@ -72,6 +73,21 @@ unsigned int query_sdram_size(void) } #endif } +#else +#include <asm/arch/mc.h> + +/* Read the RAM size directly from the memory controller */ +unsigned int query_sdram_size(void) +{ + struct mc_ctlr *const mc = (struct mc_ctlr *)NV_PA_MC_BASE; + u32 size_mb; + + size_mb = readl(&mc->mc_emem_cfg); + debug("mc->mc_emem_cfg (MEM_SIZE_MB) = 0x%08x\n", size_mb); + + return size_mb * 1024 * 1024; +} +#endif int dram_init(void) { diff --git a/arch/arm/cpu/tegra-common/vpr.c b/arch/arm/cpu/tegra-common/vpr.c new file mode 100644 index 0000000000..f695811c9b --- /dev/null +++ b/arch/arm/cpu/tegra-common/vpr.c @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +/* Tegra vpr routines */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/tegra.h> +#include <asm/arch/mc.h> + +/* Configures VPR. Right now, all we do is turn it off. */ +void config_vpr(void) +{ + struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE; + + /* Turn VPR off */ + writel(0, &mc->mc_video_protect_size_mb); + writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED, + &mc->mc_video_protect_reg_ctrl); + /* read back to ensure the write went through */ + readl(&mc->mc_video_protect_reg_ctrl); +} diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 6e2e313829..c46b7be63b 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -21,6 +21,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra20-colibri_t20_iris.dtb \ tegra30-beaver.dtb \ tegra30-cardhu.dtb \ + tegra30-colibri.dtb \ tegra30-tec-ng.dtb \ tegra114-dalmore.dtb \ tegra124-jetson-tk1.dtb \ diff --git a/arch/arm/dts/tegra30-colibri.dts b/arch/arm/dts/tegra30-colibri.dts new file mode 100644 index 0000000000..43d03ca4fa --- /dev/null +++ b/arch/arm/dts/tegra30-colibri.dts @@ -0,0 +1,85 @@ +/dts-v1/; + +#include "tegra30.dtsi" + +/ { + model = "Toradex Colibri T30"; + compatible = "toradex,colibri_t30", "nvidia,tegra30"; + + aliases { + i2c0 = "/i2c@7000d000"; + i2c1 = "/i2c@7000c000"; + i2c2 = "/i2c@7000c700"; + sdhci0 = "/sdhci@78000600"; + sdhci1 = "/sdhci@78000200"; + usb0 = "/usb@7d000000"; + usb1 = "/usb@7d004000"; /* on module only, for ASIX */ + usb2 = "/usb@7d008000"; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x40000000>; + }; + + /* GEN1_I2C: I2C_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier + board) */ + i2c@7000c000 { + status = "okay"; + clock-frequency = <100000>; + }; + + /* GEN2_I2C: unused */ + + /* CAM_I2C: unused */ + + /* DDC_CLOCK/DATA on X3 pin 15/16 (e.g. display EDID) */ + i2c@7000c700 { + status = "okay"; + clock-frequency = <100000>; + }; + + /* PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and + touch screen controller */ + i2c@7000d000 { + status = "okay"; + clock-frequency = <100000>; + }; + + /* SPI1: Colibri SSP */ + spi@7000d400 { + status = "okay"; + spi-max-frequency = <25000000>; + }; + + sdhci@78000200 { + status = "okay"; + bus-width = <4>; + cd-gpios = <&gpio 23 1>; /* PC7, MMCD */ + }; + + sdhci@78000600 { + status = "okay"; + bus-width = <8>; + non-removable; + }; + + /* EHCI instance 0: USB1_DP/N -> USBC_P/N */ + usb@7d000000 { + status = "okay"; + dr_mode = "peripheral"; + }; + + /* EHCI instance 1: USB2_DP/N -> AX88772B */ + usb@7d004000 { + status = "okay"; + phy_type = "utmi"; + nvidia,vbus-gpio = <&gpio 234 0>; /* PDD2, VBUS_LAN */ + }; + + /* EHCI instance 2: USB3_DP/N -> USBH_P/N */ + usb@7d008000 { + status = "okay"; + nvidia,vbus-gpio = <&gpio 178 1>; /* PW2, USBH_PEN */ + }; +}; diff --git a/arch/arm/include/asm/arch-tegra/ap.h b/arch/arm/include/asm/arch-tegra/ap.h index bc5851c1d0..5c8be94d97 100644 --- a/arch/arm/include/asm/arch-tegra/ap.h +++ b/arch/arm/include/asm/arch-tegra/ap.h @@ -65,3 +65,12 @@ int tegra_get_sku_info(void); /* Do any chip-specific cache config */ void config_cache(void); + +#if defined(CONFIG_TEGRA124) +/* Do chip-specific vpr config */ +void config_vpr(void); +#else +static inline void config_vpr(void) +{ +} +#endif diff --git a/arch/arm/include/asm/arch-tegra124/mc.h b/arch/arm/include/asm/arch-tegra124/mc.h new file mode 100644 index 0000000000..d526dfe15c --- /dev/null +++ b/arch/arm/include/asm/arch-tegra124/mc.h @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef _TEGRA124_MC_H_ +#define _TEGRA124_MC_H_ + +/** + * Defines the memory controller registers we need/care about + */ +struct mc_ctlr { + u32 reserved0[4]; /* offset 0x00 - 0x0C */ + u32 mc_smmu_config; /* offset 0x10 */ + u32 mc_smmu_tlb_config; /* offset 0x14 */ + u32 mc_smmu_ptc_config; /* offset 0x18 */ + u32 mc_smmu_ptb_asid; /* offset 0x1C */ + u32 mc_smmu_ptb_data; /* offset 0x20 */ + u32 reserved1[3]; /* offset 0x24 - 0x2C */ + u32 mc_smmu_tlb_flush; /* offset 0x30 */ + u32 mc_smmu_ptc_flush; /* offset 0x34 */ + u32 reserved2[6]; /* offset 0x38 - 0x4C */ + u32 mc_emem_cfg; /* offset 0x50 */ + u32 mc_emem_adr_cfg; /* offset 0x54 */ + u32 mc_emem_adr_cfg_dev0; /* offset 0x58 */ + u32 mc_emem_adr_cfg_dev1; /* offset 0x5C */ + u32 reserved3[12]; /* offset 0x60 - 0x8C */ + u32 mc_emem_arb_reserved[28]; /* offset 0x90 - 0xFC */ + u32 reserved4[338]; /* offset 0x100 - 0x644 */ + u32 mc_video_protect_bom; /* offset 0x648 */ + u32 mc_video_protect_size_mb; /* offset 0x64c */ + u32 mc_video_protect_reg_ctrl; /* offset 0x650 */ +}; + +#define TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_ENABLED (0 << 0) +#define TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED (1 << 0) + +#endif /* _TEGRA124_MC_H_ */ diff --git a/arch/arm/include/asm/mach-types.h b/arch/arm/include/asm/mach-types.h index 440b041a16..560924e83f 100644 --- a/arch/arm/include/asm/mach-types.h +++ b/arch/arm/include/asm/mach-types.h @@ -1106,6 +1106,7 @@ extern unsigned int __machine_arch_type; #define MACH_TYPE_OMAP5_SEVM 3777 #define MACH_TYPE_ARMADILLO_800EVA 3863 #define MACH_TYPE_KZM9G 4140 +#define MACH_TYPE_COLIBRI_T30 4493 #ifdef CONFIG_ARCH_EBSA110 # ifdef machine_arch_type @@ -14235,6 +14236,18 @@ extern unsigned int __machine_arch_type; # define machine_is_kzm9g() (0) #endif +#ifdef CONFIG_MACH_COLIBRI_T30 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_COLIBRI_T30 +# endif +# define machine_is_colibri_t30() (machine_arch_type == MACH_TYPE_COLIBRI_T30) +#else +# define machine_is_colibri_t30() (0) +#endif + /* * These have not yet been registered */ |