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-rw-r--r--arch/arm/dts/uniphier-ld11.dtsi7
-rw-r--r--arch/arm/dts/uniphier-ld20-ref.dts8
-rw-r--r--arch/arm/dts/uniphier-ld20.dtsi5
-rw-r--r--arch/arm/dts/uniphier-pro4.dtsi10
-rw-r--r--arch/arm/dts/uniphier-pxs2.dtsi3
-rw-r--r--arch/arm/dts/uniphier-pxs3.dtsi8
-rw-r--r--arch/arm/mach-uniphier/board_late_init.c4
7 files changed, 36 insertions, 9 deletions
diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi
index bf3118eca3..e7514f01fa 100644
--- a/arch/arm/dts/uniphier-ld11.dtsi
+++ b/arch/arm/dts/uniphier-ld11.dtsi
@@ -418,7 +418,7 @@
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-pwrseq = <&emmc_pwrseq>;
- cdns,phy-input-delay-legacy = <4>;
+ cdns,phy-input-delay-legacy = <9>;
cdns,phy-input-delay-mmc-highspeed = <2>;
cdns,phy-input-delay-mmc-ddr = <3>;
cdns,phy-dll-delay-sdclk = <21>;
@@ -553,10 +553,13 @@
status = "disabled";
reg = <0x65000000 0x8500>;
interrupts = <0 66 4>;
+ clock-names = "ether";
clocks = <&sys_clk 6>;
+ reset-names = "ether";
resets = <&sys_rst 6>;
- phy-mode = "rmii";
+ phy-mode = "internal";
local-mac-address = [00 00 00 00 00 00];
+ socionext,syscon-phy-mode = <&soc_glue 0>;
mdio: mdio {
#address-cells = <1>;
diff --git a/arch/arm/dts/uniphier-ld20-ref.dts b/arch/arm/dts/uniphier-ld20-ref.dts
index 2c1a92fafb..440c2e6a63 100644
--- a/arch/arm/dts/uniphier-ld20-ref.dts
+++ b/arch/arm/dts/uniphier-ld20-ref.dts
@@ -67,3 +67,11 @@
reg = <0>;
};
};
+
+&pinctrl_ether_rgmii {
+ tx {
+ pins = "RGMII_TXCLK", "RGMII_TXD0", "RGMII_TXD1",
+ "RGMII_TXD2", "RGMII_TXD3", "RGMII_TXCTL";
+ drive-strength = <9>;
+ };
+};
diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi
index b993df8a34..31bc124dfc 100644
--- a/arch/arm/dts/uniphier-ld20.dtsi
+++ b/arch/arm/dts/uniphier-ld20.dtsi
@@ -523,7 +523,7 @@
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-pwrseq = <&emmc_pwrseq>;
- cdns,phy-input-delay-legacy = <4>;
+ cdns,phy-input-delay-legacy = <9>;
cdns,phy-input-delay-mmc-highspeed = <2>;
cdns,phy-input-delay-mmc-ddr = <3>;
cdns,phy-dll-delay-sdclk = <21>;
@@ -622,10 +622,13 @@
interrupts = <0 66 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether_rgmii>;
+ clock-names = "ether";
clocks = <&sys_clk 6>;
+ reset-names = "ether";
resets = <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
+ socionext,syscon-phy-mode = <&soc_glue 0>;
mdio: mdio {
#address-cells = <1>;
diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi
index 25c4b4f8fc..0004863589 100644
--- a/arch/arm/dts/uniphier-pro4.dtsi
+++ b/arch/arm/dts/uniphier-pro4.dtsi
@@ -342,7 +342,7 @@
has-transaction-translator;
};
- soc-glue@5f800000 {
+ soc_glue: soc-glue@5f800000 {
compatible = "socionext,uniphier-pro4-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
@@ -427,10 +427,14 @@
interrupts = <0 66 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether_rgmii>;
- clocks = <&sys_clk 6>;
- resets = <&sys_rst 6>;
+ clock-names = "gio", "ether", "ether-gb", "ether-phy";
+ clocks = <&sys_clk 12>, <&sys_clk 6>, <&sys_clk 7>,
+ <&sys_clk 10>;
+ reset-names = "gio", "ether";
+ resets = <&sys_rst 12>, <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
+ socionext,syscon-phy-mode = <&soc_glue 0>;
mdio: mdio {
#address-cells = <1>;
diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi
index 9760f79e7c..20f3935107 100644
--- a/arch/arm/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/dts/uniphier-pxs2.dtsi
@@ -545,10 +545,13 @@
interrupts = <0 66 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether_rgmii>;
+ clock-names = "ether";
clocks = <&sys_clk 6>;
+ reset-names = "ether";
resets = <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
+ socionext,syscon-phy-mode = <&soc_glue 0>;
mdio: mdio {
#address-cells = <1>;
diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi
index d4c458a211..ae867cbb0a 100644
--- a/arch/arm/dts/uniphier-pxs3.dtsi
+++ b/arch/arm/dts/uniphier-pxs3.dtsi
@@ -338,7 +338,7 @@
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-pwrseq = <&emmc_pwrseq>;
- cdns,phy-input-delay-legacy = <4>;
+ cdns,phy-input-delay-legacy = <9>;
cdns,phy-input-delay-mmc-highspeed = <2>;
cdns,phy-input-delay-mmc-ddr = <3>;
cdns,phy-dll-delay-sdclk = <21>;
@@ -430,10 +430,13 @@
interrupts = <0 66 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether_rgmii>;
+ clock-names = "ether";
clocks = <&sys_clk 6>;
+ reset-names = "ether";
resets = <&sys_rst 6>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
+ socionext,syscon-phy-mode = <&soc_glue 0>;
mdio0: mdio {
#address-cells = <1>;
@@ -448,10 +451,13 @@
interrupts = <0 67 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether1_rgmii>;
+ clock-names = "ether";
clocks = <&sys_clk 7>;
+ reset-names = "ether";
resets = <&sys_rst 7>;
phy-mode = "rgmii";
local-mac-address = [00 00 00 00 00 00];
+ socionext,syscon-phy-mode = <&soc_glue 1>;
mdio1: mdio {
#address-cells = <1>;
diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c
index 9dff3f16a0..6a995728d4 100644
--- a/arch/arm/mach-uniphier/board_late_init.c
+++ b/arch/arm/mach-uniphier/board_late_init.c
@@ -38,7 +38,7 @@ static int uniphier_set_fdt_file(void)
char dtb_name[256];
int buf_len = sizeof(dtb_name);
- if (env_get("fdt_file"))
+ if (env_get("fdtfile"))
return 0; /* do nothing if it is already set */
compat = fdt_stringlist_get(gd->fdt_blob, 0, "compatible", 0, NULL);
@@ -56,7 +56,7 @@ static int uniphier_set_fdt_file(void)
strncat(dtb_name, ".dtb", buf_len);
- return env_set("fdt_file", dtb_name);
+ return env_set("fdtfile", dtb_name);
}
int board_late_init(void)