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-rw-r--r--arch/x86/cpu/baytrail/valleyview.c3
-rw-r--r--arch/x86/cpu/coreboot/timestamp.c22
-rw-r--r--arch/x86/cpu/efi/efi.c4
-rw-r--r--arch/x86/cpu/ivybridge/cpu.c1
-rw-r--r--arch/x86/cpu/qemu/qemu.c3
-rw-r--r--arch/x86/cpu/quark/quark.c3
-rw-r--r--arch/x86/cpu/queensbay/tnc.c3
-rw-r--r--arch/x86/dts/bayleybay.dts1
-rw-r--r--arch/x86/dts/broadwell_som-6896.dts1
-rw-r--r--arch/x86/dts/chromebook_link.dts1
-rw-r--r--arch/x86/dts/chromebox_panther.dts1
-rw-r--r--arch/x86/dts/crownbay.dts1
-rw-r--r--arch/x86/dts/efi.dts5
-rw-r--r--arch/x86/dts/galileo.dts5
-rw-r--r--arch/x86/dts/minnowmax.dts1
-rw-r--r--arch/x86/dts/qemu-x86_i440fx.dts5
-rw-r--r--arch/x86/dts/qemu-x86_q35.dts5
-rw-r--r--arch/x86/dts/tsc_timer.dtsi6
18 files changed, 32 insertions, 39 deletions
diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c
index a009c14bd9..9b30451b28 100644
--- a/arch/x86/cpu/baytrail/valleyview.c
+++ b/arch/x86/cpu/baytrail/valleyview.c
@@ -28,9 +28,6 @@ int arch_cpu_init(void)
int ret;
post_code(POST_CPU_INIT);
-#ifdef CONFIG_SYS_X86_TSC_TIMER
- timer_set_base(rdtsc());
-#endif
ret = x86_cpu_init_f();
if (ret)
diff --git a/arch/x86/cpu/coreboot/timestamp.c b/arch/x86/cpu/coreboot/timestamp.c
index 0edee6bd2c..b3827951e6 100644
--- a/arch/x86/cpu/coreboot/timestamp.c
+++ b/arch/x86/cpu/coreboot/timestamp.c
@@ -27,28 +27,6 @@ static struct timestamp_table *ts_table __attribute__((section(".data")));
void timestamp_init(void)
{
-#ifdef CONFIG_SYS_X86_TSC_TIMER
- uint64_t base_time;
-#endif
-
- ts_table = lib_sysinfo.tstamp_table;
-#ifdef CONFIG_SYS_X86_TSC_TIMER
- /*
- * If coreboot is built with CONFIG_COLLECT_TIMESTAMPS, use the value
- * of base_time in coreboot's timestamp table as our timer base,
- * otherwise TSC counter value will be used.
- *
- * Sometimes even coreboot is built with CONFIG_COLLECT_TIMESTAMPS,
- * the value of base_time in the timestamp table is still zero, so
- * we must exclude this case too (this is currently seen on booting
- * coreboot in qemu)
- */
- if (ts_table && ts_table->base_time)
- base_time = ts_table->base_time;
- else
- base_time = rdtsc();
- timer_set_base(base_time);
-#endif
timestamp_add_now(TS_U_BOOT_INITTED);
}
diff --git a/arch/x86/cpu/efi/efi.c b/arch/x86/cpu/efi/efi.c
index 75ba0d4844..993ab8dcde 100644
--- a/arch/x86/cpu/efi/efi.c
+++ b/arch/x86/cpu/efi/efi.c
@@ -10,10 +10,6 @@
int arch_cpu_init(void)
{
-#ifdef CONFIG_SYS_X86_TSC_TIMER
- timer_set_base(rdtsc());
-#endif
-
return 0;
}
diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c
index 0e6512c675..03874448a6 100644
--- a/arch/x86/cpu/ivybridge/cpu.c
+++ b/arch/x86/cpu/ivybridge/cpu.c
@@ -118,7 +118,6 @@ static void set_spi_speed(void)
int arch_cpu_init(void)
{
post_code(POST_CPU_INIT);
- timer_set_base(rdtsc());
return x86_cpu_init_f();
}
diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index 84fb082077..1f93f72dc8 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -64,9 +64,6 @@ int arch_cpu_init(void)
int ret;
post_code(POST_CPU_INIT);
-#ifdef CONFIG_SYS_X86_TSC_TIMER
- timer_set_base(rdtsc());
-#endif
ret = x86_cpu_init_f();
if (ret)
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index f737e1921f..c2bf497d68 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -233,9 +233,6 @@ int arch_cpu_init(void)
int ret;
post_code(POST_CPU_INIT);
-#ifdef CONFIG_SYS_X86_TSC_TIMER
- timer_set_base(rdtsc());
-#endif
ret = x86_cpu_init_f();
if (ret)
diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
index 933d189f05..fb81919c21 100644
--- a/arch/x86/cpu/queensbay/tnc.c
+++ b/arch/x86/cpu/queensbay/tnc.c
@@ -52,9 +52,6 @@ int arch_cpu_init(void)
int ret;
post_code(POST_CPU_INIT);
-#ifdef CONFIG_SYS_X86_TSC_TIMER
- timer_set_base(rdtsc());
-#endif
ret = x86_cpu_init_f();
if (ret)
diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
index aa863878fe..d3380dee6c 100644
--- a/arch/x86/dts/bayleybay.dts
+++ b/arch/x86/dts/bayleybay.dts
@@ -13,6 +13,7 @@
/include/ "keyboard.dtsi"
/include/ "serial.dtsi"
/include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
/ {
model = "Intel Bayley Bay";
diff --git a/arch/x86/dts/broadwell_som-6896.dts b/arch/x86/dts/broadwell_som-6896.dts
index a6b5d0f4a5..194f0ebcda 100644
--- a/arch/x86/dts/broadwell_som-6896.dts
+++ b/arch/x86/dts/broadwell_som-6896.dts
@@ -3,6 +3,7 @@
/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
/include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
/ {
model = "Advantech SOM-6896";
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
index 7870bb172b..c4469a9768 100644
--- a/arch/x86/dts/chromebook_link.dts
+++ b/arch/x86/dts/chromebook_link.dts
@@ -4,6 +4,7 @@
/include/ "keyboard.dtsi"
/include/ "serial.dtsi"
/include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
/ {
model = "Google Link";
diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts
index 61e8f2f66b..4e2b51708b 100644
--- a/arch/x86/dts/chromebox_panther.dts
+++ b/arch/x86/dts/chromebox_panther.dts
@@ -3,6 +3,7 @@
/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
/include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
/ {
model = "Google Panther";
diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
index eb8421cc79..e17ce7153a 100644
--- a/arch/x86/dts/crownbay.dts
+++ b/arch/x86/dts/crownbay.dts
@@ -12,6 +12,7 @@
/include/ "serial.dtsi"
/include/ "keyboard.dtsi"
/include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
/ {
model = "Intel Crown Bay";
diff --git a/arch/x86/dts/efi.dts b/arch/x86/dts/efi.dts
index 1f50428aa2..6cd8116afd 100644
--- a/arch/x86/dts/efi.dts
+++ b/arch/x86/dts/efi.dts
@@ -7,6 +7,7 @@
/dts-v1/;
/include/ "skeleton.dtsi"
+/include/ "tsc_timer.dtsi"
/ {
model = "EFI";
@@ -16,6 +17,10 @@
stdout-path = &serial;
};
+ tsc-timer {
+ clock-frequency = <1000000000>;
+ };
+
serial: serial {
compatible = "efi,uart";
};
diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index b49b1f55ac..2342de7c10 100644
--- a/arch/x86/dts/galileo.dts
+++ b/arch/x86/dts/galileo.dts
@@ -11,6 +11,7 @@
/include/ "skeleton.dtsi"
/include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
/ {
model = "Intel Galileo";
@@ -28,6 +29,10 @@
stdout-path = &pciuart0;
};
+ tsc-timer {
+ clock-frequency = <400000000>;
+ };
+
mrc {
compatible = "intel,quark-mrc";
flags = <MRC_FLAG_SCRAMBLE_EN>;
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index b03f9878dd..bbfd6d4028 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -12,6 +12,7 @@
/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
/include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
/ {
model = "Intel Minnowboard Max";
diff --git a/arch/x86/dts/qemu-x86_i440fx.dts b/arch/x86/dts/qemu-x86_i440fx.dts
index 8da7e52395..8a06229479 100644
--- a/arch/x86/dts/qemu-x86_i440fx.dts
+++ b/arch/x86/dts/qemu-x86_i440fx.dts
@@ -12,6 +12,7 @@
/include/ "serial.dtsi"
/include/ "keyboard.dtsi"
/include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
/ {
model = "QEMU x86 (I440FX)";
@@ -44,6 +45,10 @@
};
};
+ tsc-timer {
+ clock-frequency = <1000000000>;
+ };
+
pci {
compatible = "pci-x86";
#address-cells = <3>;
diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts
index df30c89fab..0b685c8b79 100644
--- a/arch/x86/dts/qemu-x86_q35.dts
+++ b/arch/x86/dts/qemu-x86_q35.dts
@@ -22,6 +22,7 @@
/include/ "serial.dtsi"
/include/ "keyboard.dtsi"
/include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
/ {
model = "QEMU x86 (Q35)";
@@ -55,6 +56,10 @@
};
};
+ tsc-timer {
+ clock-frequency = <1000000000>;
+ };
+
pci {
compatible = "pci-x86";
#address-cells = <3>;
diff --git a/arch/x86/dts/tsc_timer.dtsi b/arch/x86/dts/tsc_timer.dtsi
new file mode 100644
index 0000000000..4f5021d96f
--- /dev/null
+++ b/arch/x86/dts/tsc_timer.dtsi
@@ -0,0 +1,6 @@
+/ {
+ tsc-timer {
+ compatible = "x86,tsc-timer";
+ u-boot,dm-pre-reloc;
+ };
+};
generated by cgit (git 2.34.1) at 2024-12-26 16:00:17 +0000