diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/cpu/i386/cpu.c | 8 | ||||
| -rw-r--r-- | arch/x86/cpu/start_from_spl.S | 1 | ||||
| -rw-r--r-- | arch/x86/include/asm/cpu.h | 1 | ||||
| -rw-r--r-- | arch/x86/include/asm/global_data.h | 1 | ||||
| -rw-r--r-- | arch/x86/include/asm/u-boot-x86.h | 9 | ||||
| -rw-r--r-- | arch/x86/lib/spl.c | 44 | ||||
| -rw-r--r-- | arch/x86/lib/tpl.c | 37 |
7 files changed, 95 insertions, 6 deletions
diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c index 90b546e741..31663714a0 100644 --- a/arch/x86/cpu/i386/cpu.c +++ b/arch/x86/cpu/i386/cpu.c @@ -385,6 +385,14 @@ static void setup_mtrr(void) } } +int x86_cpu_init_tpl(void) +{ + setup_cpu_features(); + setup_identity(); + + return 0; +} + int x86_cpu_init_f(void) { if (ll_boot_init()) diff --git a/arch/x86/cpu/start_from_spl.S b/arch/x86/cpu/start_from_spl.S index a73b4d7c45..22cab2dd6c 100644 --- a/arch/x86/cpu/start_from_spl.S +++ b/arch/x86/cpu/start_from_spl.S @@ -31,6 +31,7 @@ _start: call board_init_f_init_reserve + call x86_cpu_reinit_f xorl %eax, %eax call board_init_f call board_init_f_r diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h index feee0f915f..21a05dab7d 100644 --- a/arch/x86/include/asm/cpu.h +++ b/arch/x86/include/asm/cpu.h @@ -55,6 +55,7 @@ enum { X86_SYSCON_PINCONF, /* Intel x86 pin configuration */ X86_SYSCON_PMU, /* Power Management Unit */ X86_SYSCON_SCU, /* System Controller Unit */ + X86_SYSCON_PUNIT, /* Power unit */ }; struct cpuid_result { diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h index 17a4d34491..7f3ada06f6 100644 --- a/arch/x86/include/asm/global_data.h +++ b/arch/x86/include/asm/global_data.h @@ -76,6 +76,7 @@ struct arch_global_data { uint8_t x86_mask; uint32_t x86_device; uint64_t tsc_base; /* Initial value returned by rdtsc() */ + bool tsc_inited; /* true if tsc is ready for use */ unsigned long clock_rate; /* Clock rate of timer in Hz */ void *new_fdt; /* Relocated FDT */ uint32_t bist; /* Built-in self test value */ diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h index 2466ad2ad3..3e5d56d075 100644 --- a/arch/x86/include/asm/u-boot-x86.h +++ b/arch/x86/include/asm/u-boot-x86.h @@ -34,6 +34,15 @@ int x86_cpu_init_f(void); */ int x86_cpu_reinit_f(void); +/** + * x86_cpu_init_tpl() - Do the minimum possible CPU init + * + * This just sets up the CPU features and figured out the identity + * + * @return 0 (indicating success, to mimic cpu_init_f()) + */ +int x86_cpu_init_tpl(void); + int cpu_init_f(void); void setup_gdt(struct global_data *id, u64 *gdt_addr); /* diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index 7623fc9ada..1677f80b25 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -5,11 +5,15 @@ #include <common.h> #include <debug_uart.h> +#include <dm.h> #include <malloc.h> #include <spl.h> +#include <syscon.h> #include <asm/cpu.h> +#include <asm/cpu_common.h> #include <asm/mrccache.h> #include <asm/mtrr.h> +#include <asm/pci.h> #include <asm/processor.h> #include <asm/spl.h> #include <asm-generic/sections.h> @@ -21,6 +25,32 @@ __weak int arch_cpu_init_dm(void) return 0; } +#ifdef CONFIG_TPL + +static int set_max_freq(void) +{ + if (cpu_get_burst_mode_state() == BURST_MODE_UNAVAILABLE) { + /* + * Burst Mode has been factory-configured as disabled and is not + * available in this physical processor package + */ + debug("Burst Mode is factory-disabled\n"); + return -ENOENT; + } + + /* Enable burst mode */ + cpu_set_burst_mode(true); + + /* Enable speed step */ + cpu_set_eist(true); + + /* Set P-State ratio */ + cpu_set_p_state_to_turbo_ratio(); + + return 0; +} +#endif + static int x86_spl_init(void) { #ifndef CONFIG_TPL @@ -31,10 +61,16 @@ static int x86_spl_init(void) * place it immediately below CONFIG_SYS_TEXT_BASE. */ char *ptr = (char *)0x110000; +#else + struct udevice *punit; #endif int ret; debug("%s starting\n", __func__); + if (IS_ENABLED(TPL)) + ret = x86_cpu_reinit_f(); + else + ret = x86_cpu_init_f(); ret = spl_init(); if (ret) { debug("%s: spl_init() failed\n", __func__); @@ -101,6 +137,14 @@ static int x86_spl_init(void) return ret; } mtrr_commit(true); +#else + ret = syscon_get_by_driver_data(X86_SYSCON_PUNIT, &punit); + if (ret) + debug("Could not find PUNIT (err=%d)\n", ret); + + ret = set_max_freq(); + if (ret) + debug("Failed to set CPU frequency (err=%d)\n", ret); #endif return 0; diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c index d70f590541..784e3a02de 100644 --- a/arch/x86/lib/tpl.c +++ b/arch/x86/lib/tpl.c @@ -5,6 +5,7 @@ #include <common.h> #include <debug_uart.h> +#include <dm.h> #include <spl.h> #include <asm/cpu.h> #include <asm/mtrr.h> @@ -23,6 +24,11 @@ static int x86_tpl_init(void) int ret; debug("%s starting\n", __func__); + ret = x86_cpu_init_tpl(); + if (ret) { + debug("%s: x86_cpu_init_tpl() failed\n", __func__); + return ret; + } ret = spl_init(); if (ret) { debug("%s: spl_init() failed\n", __func__); @@ -39,11 +45,6 @@ static int x86_tpl_init(void) return ret; } preloader_console_init(); - ret = print_cpuinfo(); - if (ret) { - debug("%s: print_cpuinfo() failed\n", __func__); - return ret; - } return 0; } @@ -106,7 +107,7 @@ int spl_spi_load_image(void) void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) { - printf("Jumping to U-Boot SPL at %lx\n", (ulong)spl_image->entry_point); + debug("Jumping to U-Boot SPL at %lx\n", (ulong)spl_image->entry_point); jump_to_spl(spl_image->entry_point); hang(); } @@ -115,3 +116,27 @@ void spl_board_init(void) { preloader_console_init(); } + +#if !CONFIG_IS_ENABLED(PCI) +/* + * This is a fake PCI bus for TPL when it doesn't have proper PCI. It is enough + * to bind the devices on the PCI bus, some of which have early-regs properties + * providing fixed BARs. Individual drivers program these BARs themselves so + * that they can access the devices. The BARs are allocated statically in the + * device tree. + * + * Once SPL is running it enables PCI properly, but does not auto-assign BARs + * for devices, so the TPL BARs continue to be used. Once U-Boot starts it does + * the auto allocation (after relocation). + */ +static const struct udevice_id tpl_fake_pci_ids[] = { + { .compatible = "pci-x86" }, + { } +}; + +U_BOOT_DRIVER(pci_x86) = { + .name = "pci_x86", + .id = UCLASS_SIMPLE_BUS, + .of_match = tpl_fake_pci_ids, +}; +#endif |