diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/arch-omap5/clock.h | 8 | ||||
| -rw-r--r-- | arch/arm/include/asm/omap_common.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap5/hw_data.c | 16 |
3 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h index 57287ff36c..7ea7199f2b 100644 --- a/arch/arm/include/asm/arch-omap5/clock.h +++ b/arch/arm/include/asm/arch-omap5/clock.h @@ -324,6 +324,9 @@ /* Standard offset is 0.5v expressed in uv */ #define PALMAS_SMPS_BASE_VOLT_UV 500000 +/* Offset is 0.73V for LP873x */ +#define LP873X_BUCK_BASE_VOLT_UV 730000 + /* TPS659038 */ #define TPS659038_I2C_SLAVE_ADDR 0x58 #define TPS659038_REG_ADDR_SMPS12 0x23 @@ -338,6 +341,11 @@ #define TPS65917_REG_ADDR_SMPS2 0x27 #define TPS65917_REG_ADDR_SMPS3 0x2F +/* LP873X */ +#define LP873X_I2C_SLAVE_ADDR 0x60 +#define LP873X_REG_ADDR_BUCK0 0x6 +#define LP873X_REG_ADDR_BUCK1 0x7 +#define LP873X_REG_ADDR_LDO1 0xA /* TPS */ #define TPS62361_I2C_SLAVE_ADDR 0x60 diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index c3d5cda6a1..2034a5e9b8 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -600,6 +600,7 @@ extern struct omap_sys_ctrl_regs const omap5_ctrl; extern struct omap_sys_ctrl_regs const dra7xx_ctrl; extern struct pmic_data tps659038; +extern struct pmic_data lp8733; void hw_data_init(void); diff --git a/arch/arm/mach-omap2/omap5/hw_data.c b/arch/arm/mach-omap2/omap5/hw_data.c index c85c71a87c..58991d7d04 100644 --- a/arch/arm/mach-omap2/omap5/hw_data.c +++ b/arch/arm/mach-omap2/omap5/hw_data.c @@ -336,6 +336,22 @@ struct pmic_data tps659038 = { .gpio_en = 0, }; +/* The LP8732 and LP8733 are software-compatible, use common struct */ +struct pmic_data lp8733 = { + .base_offset = LP873X_BUCK_BASE_VOLT_UV, + .step = 5000, /* 5 mV represented in uV */ + /* + * Offset codes 0 - 0x13 Invalid. + * Offset codes 0x14 0x17 give 10mV steps + * Offset codes 0x17 through 0x9D give 5mV steps + * So let us start with our operating range from .73V + */ + .start_code = 0x17, + .i2c_slave_addr = 0x60, + .pmic_bus_init = gpi2c_init, + .pmic_write = palmas_i2c_write_u8, +}; + struct vcores_data omap5430_volts = { .mpu.value[OPP_NOM] = VDD_MPU, .mpu.addr = SMPS_REG_ADDR_12_MPU, |