diff options
Diffstat (limited to 'board/amlogic')
-rw-r--r-- | board/amlogic/libretech-cc/Kconfig | 12 | ||||
-rw-r--r-- | board/amlogic/libretech-cc/MAINTAINERS | 6 | ||||
-rw-r--r-- | board/amlogic/libretech-cc/Makefile | 8 | ||||
-rw-r--r-- | board/amlogic/libretech-cc/README | 96 | ||||
-rw-r--r-- | board/amlogic/libretech-cc/libretech-cc.c | 53 |
5 files changed, 175 insertions, 0 deletions
diff --git a/board/amlogic/libretech-cc/Kconfig b/board/amlogic/libretech-cc/Kconfig new file mode 100644 index 0000000000..7a6f9169bd --- /dev/null +++ b/board/amlogic/libretech-cc/Kconfig @@ -0,0 +1,12 @@ +if TARGET_LIBRETECH_CC + +config SYS_BOARD + default "libretech-cc" + +config SYS_VENDOR + default "amlogic" + +config SYS_CONFIG_NAME + default "libretech-cc" + +endif diff --git a/board/amlogic/libretech-cc/MAINTAINERS b/board/amlogic/libretech-cc/MAINTAINERS new file mode 100644 index 0000000000..398ce57db2 --- /dev/null +++ b/board/amlogic/libretech-cc/MAINTAINERS @@ -0,0 +1,6 @@ +LIBRETECH-CC +M: Neil Armstrong <narmstrong@baylibre.com> +S: Maintained +F: board/amlogic/libretech-cc/ +F: include/configs/libretech-cc.h +F: configs/libretech-cc_defconfig diff --git a/board/amlogic/libretech-cc/Makefile b/board/amlogic/libretech-cc/Makefile new file mode 100644 index 0000000000..d0e3bbb991 --- /dev/null +++ b/board/amlogic/libretech-cc/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2016 BayLibre, SAS +# Author: Neil Armstrong <narmstrong@baylibre.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := libretech-cc.o diff --git a/board/amlogic/libretech-cc/README b/board/amlogic/libretech-cc/README new file mode 100644 index 0000000000..c06a392482 --- /dev/null +++ b/board/amlogic/libretech-cc/README @@ -0,0 +1,96 @@ +U-Boot for LibreTech CC +======================= + +LibreTech CC is a single board computer manufactured by Libre Technology +with the following specifications: + + - Amlogic S905X ARM Cortex-A53 quad-core SoC @ 2GHz + - ARM Mali 450 GPU + - 2GB DDR3 SDRAM + - Gigabit Ethernet + - HDMI 2.0 4K/60Hz display + - 40-pin GPIO header + - 4 x USB 2.0 Host, 1 x USB OTG + - eMMC, microSD + - Infrared receiver + +Schematics are available on the manufacturer website. + +Currently the U-Boot port supports the following devices: + - serial + - eMMC, microSD + - Ethernet + +U-Boot compilation +================== + + > export ARCH=arm + > export CROSS_COMPILE=aarch64-none-elf- + > make libretech-cc_defconfig + > make + +Image creation +============== + +Amlogic doesn't provide sources for the firmware and for tools needed +to create the bootloader image, so it is necessary to obtain them from +the git tree published by the board vendor: + + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH + > git clone https://github.com/BayLibre/u-boot.git -b libretech-cc amlogic-u-boot + > cd amlogic-u-boot + > make libretech_cc_defconfig + > make + > export FIPDIR=$PWD/fip + +Go back to mainline U-Boot source tree then : + > mkdir fip + + > cp $FIPDIR/gxl/bl2.bin fip/ + > cp $FIPDIR/gxl/acs.bin fip/ + > cp $FIPDIR/gxl/bl21.bin fip/ + > cp $FIPDIR/gxl/bl30.bin fip/ + > cp $FIPDIR/gxl/bl301.bin fip/ + > cp $FIPDIR/gxl/bl31.img fip/ + > cp u-boot.bin fip/bl33.bin + + > $FIPDIR/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + + > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0 + + > $FIPDIR/blx_fix.sh \ + fip/bl2_acs.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/bl21.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img + > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin + > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig + > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \ + --output fip/u-boot.bin \ + --bl2 fip/bl2.n.bin.sig \ + --bl30 fip/bl30_new.bin.enc \ + --bl31 fip/bl31.img.enc \ + --bl33 fip/bl33.bin.enc + +and then write the image to SD with: + + > DEV=/dev/your_sd_device + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444 diff --git a/board/amlogic/libretech-cc/libretech-cc.c b/board/amlogic/libretech-cc/libretech-cc.c new file mode 100644 index 0000000000..26c0e78a46 --- /dev/null +++ b/board/amlogic/libretech-cc/libretech-cc.c @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2016 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <asm/io.h> +#include <asm/arch/gxbb.h> +#include <asm/arch/sm.h> +#include <asm/arch/eth.h> + +#define EFUSE_SN_OFFSET 20 +#define EFUSE_SN_SIZE 16 +#define EFUSE_MAC_OFFSET 52 +#define EFUSE_MAC_SIZE 6 + +int board_init(void) +{ + return 0; +} + +int misc_init_r(void) +{ + u8 mac_addr[EFUSE_MAC_SIZE]; + char serial[EFUSE_SN_SIZE]; + ssize_t len; + + meson_gx_eth_init(PHY_INTERFACE_MODE_RMII, + MESON_GXL_USE_INTERNAL_RMII_PHY); + + /* Enable power and clock gate */ + setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH); + clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK); + + if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { + len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, + mac_addr, EFUSE_MAC_SIZE); + if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr)) + eth_env_set_enetaddr("ethaddr", mac_addr); + } + + if (!env_get("serial#")) { + len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial, + EFUSE_SN_SIZE); + if (len == EFUSE_SN_SIZE) + env_set("serial#", serial); + } + + return 0; +} |