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Diffstat (limited to 'board/armltd/total_compute/total_compute.c')
-rw-r--r--board/armltd/total_compute/total_compute.c67
1 files changed, 67 insertions, 0 deletions
diff --git a/board/armltd/total_compute/total_compute.c b/board/armltd/total_compute/total_compute.c
new file mode 100644
index 0000000000..0be6435fe3
--- /dev/null
+++ b/board/armltd/total_compute/total_compute.c
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2020 Arm Limited
+ * Usama Arif <usama.arif@arm.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/platform_data/serial_pl01x.h>
+#include <asm/armv8/mmu.h>
+
+static const struct pl01x_serial_platdata serial_platdata = {
+ .base = UART0_BASE,
+ .type = TYPE_PL011,
+ .clock = CONFIG_PL011_CLOCK,
+};
+
+U_BOOT_DEVICE(total_compute_serials) = {
+ .name = "serial_pl01x",
+ .platdata = &serial_platdata,
+};
+
+static struct mm_region total_compute_mem_map[] = {
+ {
+ .virt = 0x0UL,
+ .phys = 0x0UL,
+ .size = 0x80000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ .virt = 0x80000000UL,
+ .phys = 0x80000000UL,
+ .size = 0xff80000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ }, {
+ /* List terminator */
+ 0,
+ }
+};
+
+struct mm_region *mem_map = total_compute_mem_map;
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = PHYS_SDRAM_1_SIZE;
+ return 0;
+}
+
+int dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+ return 0;
+}
+
+/* Nothing to be done here as handled by PSCI interface */
+void reset_cpu(ulong addr)
+{
+}