diff options
Diffstat (limited to 'board/freescale/ls1043aqds')
-rw-r--r-- | board/freescale/ls1043aqds/eth.c | 33 |
1 files changed, 17 insertions, 16 deletions
diff --git a/board/freescale/ls1043aqds/eth.c b/board/freescale/ls1043aqds/eth.c index 8763913e31..e1919d2988 100644 --- a/board/freescale/ls1043aqds/eth.c +++ b/board/freescale/ls1043aqds/eth.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2015 Freescale Semiconductor, Inc. + * Copyright 2019 NXP */ #include <common.h> @@ -161,16 +162,16 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII) { if (port == FM1_DTSEC9) { fdt_set_phy_handle(fdt, compat, addr, - "sgmii_riser_s1_p1"); + "sgmii-riser-s1-p1"); } else if (port == FM1_DTSEC2) { fdt_set_phy_handle(fdt, compat, addr, - "sgmii_riser_s2_p1"); + "sgmii-riser-s2-p1"); } else if (port == FM1_DTSEC5) { fdt_set_phy_handle(fdt, compat, addr, - "sgmii_riser_s3_p1"); + "sgmii-riser-s3-p1"); } else if (port == FM1_DTSEC6) { fdt_set_phy_handle(fdt, compat, addr, - "sgmii_riser_s4_p1"); + "sgmii-riser-s4-p1"); } } else if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII_2500) { @@ -191,19 +192,19 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, switch (port) { case FM1_DTSEC1: fdt_set_phy_handle(fdt, compat, addr, - "qsgmii_s1_p1"); + "qsgmii-s1-p1"); break; case FM1_DTSEC2: fdt_set_phy_handle(fdt, compat, addr, - "qsgmii_s1_p2"); + "qsgmii-s1-p2"); break; case FM1_DTSEC5: fdt_set_phy_handle(fdt, compat, addr, - "qsgmii_s1_p3"); + "qsgmii-s1-p3"); break; case FM1_DTSEC6: fdt_set_phy_handle(fdt, compat, addr, - "qsgmii_s1_p4"); + "qsgmii-s1-p4"); break; default: break; @@ -213,19 +214,19 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, switch (port) { case FM1_DTSEC1: fdt_set_phy_handle(fdt, compat, addr, - "qsgmii_s2_p1"); + "qsgmii-s2-p1"); break; case FM1_DTSEC2: fdt_set_phy_handle(fdt, compat, addr, - "qsgmii_s2_p2"); + "qsgmii-s2-p2"); break; case FM1_DTSEC5: fdt_set_phy_handle(fdt, compat, addr, - "qsgmii_s2_p3"); + "qsgmii-s2-p3"); break; case FM1_DTSEC6: fdt_set_phy_handle(fdt, compat, addr, - "qsgmii_s2_p4"); + "qsgmii-s2-p4"); break; default: break; @@ -268,16 +269,16 @@ void fdt_fixup_board_enet(void *fdt) case PHY_INTERFACE_MODE_QSGMII: switch (mdio_mux[i]) { case EMI1_SLOT1: - fdt_status_okay_by_alias(fdt, "emi1_slot1"); + fdt_status_okay_by_alias(fdt, "emi1-slot1"); break; case EMI1_SLOT2: - fdt_status_okay_by_alias(fdt, "emi1_slot2"); + fdt_status_okay_by_alias(fdt, "emi1-slot2"); break; case EMI1_SLOT3: - fdt_status_okay_by_alias(fdt, "emi1_slot3"); + fdt_status_okay_by_alias(fdt, "emi1-slot3"); break; case EMI1_SLOT4: - fdt_status_okay_by_alias(fdt, "emi1_slot4"); + fdt_status_okay_by_alias(fdt, "emi1-slot4"); break; default: break; |