1 files changed, 43 insertions, 28 deletions

diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index df2d768718..d7122b3dfc 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -204,25 +204,12 @@ int config_board_mux(int ctrl_type)
 
 int board_init(void)
 {
-	char *env_hwconfig;
-	u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
 #ifdef CONFIG_FSL_MC_ENET
 	u32 __iomem *irq_ccsr = (u32 __iomem *)ISC_BASE;
 #endif
-	u32 val;
 
 	init_final_memctl_regs();
 
-	val = in_le32(dcfg_ccsr + DCFG_RCWSR13 / 4);
-
-	env_hwconfig = getenv("hwconfig");
-
-	if (hwconfig_f("dspi", env_hwconfig) &&
-	    DCFG_RCWSR13_DSPI == (val & (u32)(0xf << 8)))
-		config_board_mux(MUX_TYPE_DSPI);
-	else
-		config_board_mux(MUX_TYPE_SDHC);
-
 #ifdef CONFIG_ENV_IS_NOWHERE
 	gd->env_addr = (ulong)&default_environment[0];
 #endif
@@ -257,31 +244,31 @@ int board_early_init_f(void)
 
 int misc_init_r(void)
 {
-#ifdef CONFIG_FSL_QIXIS
-	/*
-	 * LS2081ARDB has smart voltage translator which needs
-	 * to be programmed as below
-	 */
-#ifndef CONFIG_TARGET_LS2081ARDB
-	u8 sw;
+	char *env_hwconfig;
+	u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
+	u32 val;
+
+	val = in_le32(dcfg_ccsr + DCFG_RCWSR13 / 4);
+
+	env_hwconfig = getenv("hwconfig");
+
+	if (hwconfig_f("dspi", env_hwconfig) &&
+	    DCFG_RCWSR13_DSPI == (val & (u32)(0xf << 8)))
+		config_board_mux(MUX_TYPE_DSPI);
+	else
+		config_board_mux(MUX_TYPE_SDHC);
 
-	sw = QIXIS_READ(arch);
 	/*
-	 * LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
+	 * LS2081ARDB RevF board has smart voltage translator
 	 * which needs to be programmed to enable high speed SD interface
 	 * by setting GPIO4_10 output to zero
 	 */
-	if ((sw & 0xf) == 0x5) {
-#endif
+#ifdef CONFIG_TARGET_LS2081ARDB
 		out_le32(GPIO4_GPDIR_ADDR, (1 << 21 |
 					    in_le32(GPIO4_GPDIR_ADDR)));
 		out_le32(GPIO4_GPDAT_ADDR, (~(1 << 21) &
 					    in_le32(GPIO4_GPDAT_ADDR)));
-#ifndef CONFIG_TARGET_LS2081ARDB
-	}
-#endif
 #endif
-
 	if (hwconfig("sdhc"))
 		config_board_mux(MUX_TYPE_SDHC);
 
@@ -341,6 +328,32 @@ void board_quiesce_devices(void)
 #endif
 
 #ifdef CONFIG_OF_BOARD_SETUP
+void fsl_fdt_fixup_flash(void *fdt)
+{
+	int offset;
+
+/*
+ * IFC and QSPI are muxed on board.
+ * So disable IFC node in dts if QSPI is enabled or
+ * disable QSPI node in dts in case QSPI is not enabled.
+ */
+#ifdef CONFIG_FSL_QSPI
+	offset = fdt_path_offset(fdt, "/soc/ifc");
+
+	if (offset < 0)
+		offset = fdt_path_offset(fdt, "/ifc");
+#else
+	offset = fdt_path_offset(fdt, "/soc/quadspi");
+
+	if (offset < 0)
+		offset = fdt_path_offset(fdt, "/quadspi");
+#endif
+	if (offset < 0)
+		return;
+
+	fdt_status_disabled(fdt, offset);
+}
+
 int ft_board_setup(void *blob, bd_t *bd)
 {
 	u64 base[CONFIG_NR_DRAM_BANKS];
@@ -368,6 +381,8 @@ int ft_board_setup(void *blob, bd_t *bd)
 
 	fsl_fdt_fixup_dr_usb(blob, bd);
 
+	fsl_fdt_fixup_flash(blob);
+
 #ifdef CONFIG_FSL_MC_ENET
 	fdt_fixup_board_enet(blob);
 #endif