diff options
Diffstat (limited to 'board/freescale/p1_p2_rdb_pc/ddr.c')
| -rw-r--r-- | board/freescale/p1_p2_rdb_pc/ddr.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c b/board/freescale/p1_p2_rdb_pc/ddr.c index 1f3793b853..fc38326138 100644 --- a/board/freescale/p1_p2_rdb_pc/ddr.c +++ b/board/freescale/p1_p2_rdb_pc/ddr.c @@ -15,8 +15,8 @@ #ifdef CONFIG_SYS_DDR_RAW_TIMING #if defined(CONFIG_P1020RDB_PROTO) || \ - defined(CONFIG_P1021RDB) || \ - defined(CONFIG_P1020UTM) + defined(CONFIG_TARGET_P1021RDB) || \ + defined(CONFIG_TARGET_P1020UTM) /* Micron MT41J256M8_187E */ dimm_params_t ddr_raw_timing = { .n_ranks = 1, @@ -47,7 +47,7 @@ dimm_params_t ddr_raw_timing = { .refresh_rate_ps = 7800000, .tfaw_ps = 37500, }; -#elif defined(CONFIG_P2020RDB) +#elif defined(CONFIG_TARGET_P2020RDB) /* Micron MT41J128M16_15E */ dimm_params_t ddr_raw_timing = { .n_ranks = 1, @@ -78,7 +78,7 @@ dimm_params_t ddr_raw_timing = { .refresh_rate_ps = 7800000, .tfaw_ps = 30000, }; -#elif (defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD)) +#elif (defined(CONFIG_TARGET_P1020MBG) || defined(CONFIG_TARGET_P1020RDB_PD)) /* Micron MT41J512M8_187E */ dimm_params_t ddr_raw_timing = { .n_ranks = 2, @@ -109,7 +109,7 @@ dimm_params_t ddr_raw_timing = { .refresh_rate_ps = 7800000, .tfaw_ps = 37500, }; -#elif defined(CONFIG_P1020RDB_PC) +#elif defined(CONFIG_TARGET_P1020RDB_PC) /* * Samsung K4B2G0846C-HCF8 * The following timing are for "downshift" @@ -146,8 +146,8 @@ dimm_params_t ddr_raw_timing = { .refresh_rate_ps = 7800000, .tfaw_ps = 37500, }; -#elif defined(CONFIG_P1024RDB) || \ - defined(CONFIG_P1025RDB) +#elif defined(CONFIG_TARGET_P1024RDB) || \ + defined(CONFIG_TARGET_P1025RDB) /* * Samsung K4B2G0846C-HCH9 * The following timing are for "downshift" |