summaryrefslogtreecommitdiff
path: root/board/freescale/t208xrdb
diff options
context:
space:
mode:
Diffstat (limited to 'board/freescale/t208xrdb')
-rw-r--r--board/freescale/t208xrdb/t2080_nand_rcw.cfg (renamed from board/freescale/t208xrdb/t2080_rcw.cfg)0
-rw-r--r--board/freescale/t208xrdb/t2080_pbi.cfg3
-rw-r--r--board/freescale/t208xrdb/t2080_sd_rcw.cfg19
-rw-r--r--board/freescale/t208xrdb/t2080_spi_rcw.cfg19
4 files changed, 39 insertions, 2 deletions
diff --git a/board/freescale/t208xrdb/t2080_rcw.cfg b/board/freescale/t208xrdb/t2080_nand_rcw.cfg
index 8096ff9f37..8096ff9f37 100644
--- a/board/freescale/t208xrdb/t2080_rcw.cfg
+++ b/board/freescale/t208xrdb/t2080_nand_rcw.cfg
diff --git a/board/freescale/t208xrdb/t2080_pbi.cfg b/board/freescale/t208xrdb/t2080_pbi.cfg
index e200d926fb..43be8a864e 100644
--- a/board/freescale/t208xrdb/t2080_pbi.cfg
+++ b/board/freescale/t208xrdb/t2080_pbi.cfg
@@ -37,5 +37,4 @@
09000014 ff000000
09000018 81000000
#Flush PBL data
-09138000 00000000
-091380c0 00000000
+091380c0 00100000
diff --git a/board/freescale/t208xrdb/t2080_sd_rcw.cfg b/board/freescale/t208xrdb/t2080_sd_rcw.cfg
new file mode 100644
index 0000000000..6309b1d220
--- /dev/null
+++ b/board/freescale/t208xrdb/t2080_sd_rcw.cfg
@@ -0,0 +1,19 @@
+#PBL preamble and RCW header
+aa55aa55 010e0100
+
+#For T2080 v1.0
+#SerDes=0x66_0x16, Core=1533MHz, DDR=1600MT/s
+#120c0017 15000000 00000000 00000000
+#66150002 00008400 ec104000 c1000000
+#00000000 00000000 00000000 000307fc
+#00000000 00000000 00000000 00000004
+
+#For T2080 v1.1
+#SerDes=0x66_0x15, Core:1800MHz, DDR:1600MT/s
+#1206001b 15000000 00000000 00000000
+
+#SerDes=0x66_0x15, Core:1800MHz, DDR:1867MT/s
+1207001b 15000000 00000000 00000000
+66150002 00000000 68104000 c1000000
+00800000 00000000 00000000 000307fc
+00000000 00000000 00000000 00000004
diff --git a/board/freescale/t208xrdb/t2080_spi_rcw.cfg b/board/freescale/t208xrdb/t2080_spi_rcw.cfg
new file mode 100644
index 0000000000..f167495887
--- /dev/null
+++ b/board/freescale/t208xrdb/t2080_spi_rcw.cfg
@@ -0,0 +1,19 @@
+#PBL preamble and RCW header
+aa55aa55 010e0100
+
+#For T2080 v1.0
+#SerDes=0x66_0x16, Core=1533MHz, DDR=1600MT/s
+#120c0017 15000000 00000000 00000000
+#66150002 00008400 ec104000 c1000000
+#00000000 00000000 00000000 000307fc
+#00000000 00000000 00000000 00000004
+
+#For T2080 v1.1
+#SerDes=0x66_0x15, Core:1800MHz, DDR:1600MT/s
+#1206001b 15000000 00000000 00000000
+
+#SerDes=0x66_0x15, Core:1800MHz, DDR:1867MT/s
+1207001b 15000000 00000000 00000000
+66150002 00000000 58104000 c1000000
+00800000 00000000 00000000 000307fc
+00000000 00000000 00000000 00000004