summaryrefslogtreecommitdiff
path: root/board/freescale
diff options
context:
space:
mode:
Diffstat (limited to 'board/freescale')
-rw-r--r--board/freescale/b4860qds/ddr.c32
-rw-r--r--board/freescale/bsc9131rdb/ddr.c26
-rw-r--r--board/freescale/bsc9132qds/ddr.c26
-rw-r--r--board/freescale/c29xpcie/ddr.c26
-rw-r--r--board/freescale/corenet_ds/ddr.c6
-rw-r--r--board/freescale/mpc8349emds/ddr.c8
-rw-r--r--board/freescale/mpc8540ads/ddr.c2
-rw-r--r--board/freescale/mpc8544ds/ddr.c2
-rw-r--r--board/freescale/mpc8560ads/ddr.c2
-rw-r--r--board/freescale/mpc8572ds/ddr.c6
-rw-r--r--board/freescale/mpc8610hpcd/ddr.c2
-rw-r--r--board/freescale/mpc8641hpcn/ddr.c2
-rw-r--r--board/freescale/p1010rdb/ddr.c26
-rw-r--r--board/freescale/p1022ds/ddr.c6
-rw-r--r--board/freescale/p1023rdb/ddr.c26
-rw-r--r--board/freescale/p1_p2_rdb_pc/ddr.c130
-rw-r--r--board/freescale/p2020ds/ddr.c6
-rw-r--r--board/freescale/p2041rdb/ddr.c6
-rw-r--r--board/freescale/t4qds/ddr.c4
-rw-r--r--board/freescale/t4qds/ddr.h2
20 files changed, 173 insertions, 173 deletions
diff --git a/board/freescale/b4860qds/ddr.c b/board/freescale/b4860qds/ddr.c
index b82b3d409e..2d14923139 100644
--- a/board/freescale/b4860qds/ddr.c
+++ b/board/freescale/b4860qds/ddr.c
@@ -31,20 +31,20 @@ dimm_params_t ddr_raw_timing = {
.edc_config = 2, /* ECC */
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1071,
- .caslat_X = 0x2fe << 4, /* 5,6,7,8,9,10,11,13 */
- .tAA_ps = 13910,
- .tWR_ps = 15000,
- .tRCD_ps = 13910,
- .tRRD_ps = 6000,
- .tRP_ps = 13910,
- .tRAS_ps = 34000,
- .tRC_ps = 48910,
- .tRFC_ps = 260000,
- .tWTR_ps = 7500,
- .tRTP_ps = 7500,
+ .tckmin_x_ps = 1071,
+ .caslat_x = 0x2fe << 4, /* 5,6,7,8,9,10,11,13 */
+ .taa_ps = 13910,
+ .twr_ps = 15000,
+ .trcd_ps = 13910,
+ .trrd_ps = 6000,
+ .trp_ps = 13910,
+ .tras_ps = 34000,
+ .trc_ps = 48910,
+ .trfc_ps = 260000,
+ .twtr_ps = 7500,
+ .trtp_ps = 7500,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 35000,
+ .tfaw_ps = 35000,
};
int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
@@ -71,7 +71,7 @@ struct board_specific_parameters {
u32 wrlvl_ctl_3;
u32 cpo;
u32 write_data_delay;
- u32 force_2T;
+ u32 force_2t;
};
/*
@@ -129,7 +129,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
popts->wrlvl_start = pbsp->wrlvl_start;
popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;
popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;
- popts->twoT_en = pbsp->force_2T;
+ popts->twot_en = pbsp->force_2t;
goto found;
}
pbsp_highest = pbsp;
@@ -146,7 +146,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
popts->write_data_delay = pbsp_highest->write_data_delay;
popts->clk_adjust = pbsp_highest->clk_adjust;
popts->wrlvl_start = pbsp_highest->wrlvl_start;
- popts->twoT_en = pbsp_highest->force_2T;
+ popts->twot_en = pbsp_highest->force_2t;
} else {
panic("DIMM is not supported by this board");
}
diff --git a/board/freescale/bsc9131rdb/ddr.c b/board/freescale/bsc9131rdb/ddr.c
index c82fe0aab3..a9e92f2ae0 100644
--- a/board/freescale/bsc9131rdb/ddr.c
+++ b/board/freescale/bsc9131rdb/ddr.c
@@ -114,20 +114,20 @@ dimm_params_t ddr_raw_timing = {
.edc_config = 0,
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1870,
- .caslat_X = 0x1e << 4, /* 5,6,7,8 */
- .tAA_ps = 13125,
- .tWR_ps = 15000,
- .tRCD_ps = 13125,
- .tRRD_ps = 7500,
- .tRP_ps = 13125,
- .tRAS_ps = 37500,
- .tRC_ps = 50625,
- .tRFC_ps = 160000,
- .tWTR_ps = 7500,
- .tRTP_ps = 7500,
+ .tckmin_x_ps = 1870,
+ .caslat_x = 0x1e << 4, /* 5,6,7,8 */
+ .taa_ps = 13125,
+ .twr_ps = 15000,
+ .trcd_ps = 13125,
+ .trrd_ps = 7500,
+ .trp_ps = 13125,
+ .tras_ps = 37500,
+ .trc_ps = 50625,
+ .trfc_ps = 160000,
+ .twtr_ps = 7500,
+ .trtp_ps = 7500,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 37500,
+ .tfaw_ps = 37500,
};
int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
diff --git a/board/freescale/bsc9132qds/ddr.c b/board/freescale/bsc9132qds/ddr.c
index fdea193129..b3130be86d 100644
--- a/board/freescale/bsc9132qds/ddr.c
+++ b/board/freescale/bsc9132qds/ddr.c
@@ -136,20 +136,20 @@ dimm_params_t ddr_raw_timing = {
.edc_config = 0,
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1870,
- .caslat_X = 0x1e << 4, /* 5,6,7,8 */
- .tAA_ps = 13125,
- .tWR_ps = 15000,
- .tRCD_ps = 13125,
- .tRRD_ps = 7500,
- .tRP_ps = 13125,
- .tRAS_ps = 37500,
- .tRC_ps = 50625,
- .tRFC_ps = 160000,
- .tWTR_ps = 7500,
- .tRTP_ps = 7500,
+ .tckmin_x_ps = 1870,
+ .caslat_x = 0x1e << 4, /* 5,6,7,8 */
+ .taa_ps = 13125,
+ .twr_ps = 15000,
+ .trcd_ps = 13125,
+ .trrd_ps = 7500,
+ .trp_ps = 13125,
+ .tras_ps = 37500,
+ .trc_ps = 50625,
+ .trfc_ps = 160000,
+ .twtr_ps = 7500,
+ .trtp_ps = 7500,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 37500,
+ .tfaw_ps = 37500,
};
int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
diff --git a/board/freescale/c29xpcie/ddr.c b/board/freescale/c29xpcie/ddr.c
index 3337d6c9e0..804ea1916d 100644
--- a/board/freescale/c29xpcie/ddr.c
+++ b/board/freescale/c29xpcie/ddr.c
@@ -26,20 +26,20 @@ dimm_params_t ddr_raw_timing = {
.edc_config = 2,
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1650,
- .caslat_X = 0x7e << 4, /* 5,6,7,8,9,10 */
- .tAA_ps = 14050,
- .tWR_ps = 15000,
- .tRCD_ps = 13500,
- .tRRD_ps = 75000,
- .tRP_ps = 13500,
- .tRAS_ps = 40000,
- .tRC_ps = 49500,
- .tRFC_ps = 160000,
- .tWTR_ps = 75000,
- .tRTP_ps = 75000,
+ .tckmin_x_ps = 1650,
+ .caslat_x = 0x7e << 4, /* 5,6,7,8,9,10 */
+ .taa_ps = 14050,
+ .twr_ps = 15000,
+ .trcd_ps = 13500,
+ .trrd_ps = 75000,
+ .trp_ps = 13500,
+ .tras_ps = 40000,
+ .trc_ps = 49500,
+ .trfc_ps = 160000,
+ .twtr_ps = 75000,
+ .trtp_ps = 75000,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 30000,
+ .tfaw_ps = 30000,
};
int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
diff --git a/board/freescale/corenet_ds/ddr.c b/board/freescale/corenet_ds/ddr.c
index 517e87ff4c..18e2ff617b 100644
--- a/board/freescale/corenet_ds/ddr.c
+++ b/board/freescale/corenet_ds/ddr.c
@@ -114,7 +114,7 @@ struct board_specific_parameters {
u32 wrlvl_start;
u32 cpo;
u32 write_data_delay;
- u32 force_2T;
+ u32 force_2t;
};
/*
@@ -217,7 +217,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
pbsp->write_data_delay;
popts->clk_adjust = pbsp->clk_adjust;
popts->wrlvl_start = pbsp->wrlvl_start;
- popts->twoT_en = pbsp->force_2T;
+ popts->twot_en = pbsp->force_2t;
goto found;
}
pbsp_highest = pbsp;
@@ -234,7 +234,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
popts->write_data_delay = pbsp_highest->write_data_delay;
popts->clk_adjust = pbsp_highest->clk_adjust;
popts->wrlvl_start = pbsp_highest->wrlvl_start;
- popts->twoT_en = pbsp_highest->force_2T;
+ popts->twot_en = pbsp_highest->force_2t;
} else {
panic("DIMM is not supported by this board");
}
diff --git a/board/freescale/mpc8349emds/ddr.c b/board/freescale/mpc8349emds/ddr.c
index c66750e2e3..3d257d0fbf 100644
--- a/board/freescale/mpc8349emds/ddr.c
+++ b/board/freescale/mpc8349emds/ddr.c
@@ -15,7 +15,7 @@ struct board_specific_parameters {
u32 clk_adjust;
u32 cpo;
u32 write_data_delay;
- u32 force_2T;
+ u32 force_2t;
};
/*
@@ -70,7 +70,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
popts->cpo_override = pbsp->cpo;
popts->write_data_delay =
pbsp->write_data_delay;
- popts->twoT_en = pbsp->force_2T;
+ popts->twot_en = pbsp->force_2t;
goto found;
}
pbsp_highest = pbsp;
@@ -86,7 +86,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
popts->clk_adjust = pbsp_highest->clk_adjust;
popts->cpo_override = pbsp_highest->cpo;
popts->write_data_delay = pbsp_highest->write_data_delay;
- popts->twoT_en = pbsp_highest->force_2T;
+ popts->twot_en = pbsp_highest->force_2t;
} else {
panic("DIMM is not supported by this board");
}
@@ -97,5 +97,5 @@ found:
* - number of DIMMs installed
*/
popts->half_strength_driver_enable = 0;
- popts->DQS_config = 0; /* only true DQS signal is used on board */
+ popts->dqs_config = 0; /* only true DQS signal is used on board */
}
diff --git a/board/freescale/mpc8540ads/ddr.c b/board/freescale/mpc8540ads/ddr.c
index 571137443e..9e79815278 100644
--- a/board/freescale/mpc8540ads/ddr.c
+++ b/board/freescale/mpc8540ads/ddr.c
@@ -36,7 +36,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
popts->write_data_delay = 3;
/* 2T timing enable */
- popts->twoT_en = 1;
+ popts->twot_en = 1;
/*
* Factors to consider for half-strength driver enable:
diff --git a/board/freescale/mpc8544ds/ddr.c b/board/freescale/mpc8544ds/ddr.c
index 94219b9471..6cf9bc1d75 100644
--- a/board/freescale/mpc8544ds/ddr.c
+++ b/board/freescale/mpc8544ds/ddr.c
@@ -49,7 +49,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
popts->write_data_delay = 3;
/* 2T timing enable */
- popts->twoT_en = 1;
+ popts->twot_en = 1;
/*
* Factors to consider for half-strength driver enable:
diff --git a/board/freescale/mpc8560ads/ddr.c b/board/freescale/mpc8560ads/ddr.c
index 571137443e..9e79815278 100644
--- a/board/freescale/mpc8560ads/ddr.c
+++ b/board/freescale/mpc8560ads/ddr.c
@@ -36,7 +36,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
popts->write_data_delay = 3;
/* 2T timing enable */
- popts->twoT_en = 1;
+ popts->twot_en = 1;
/*
* Factors to consider for half-strength driver enable:
diff --git a/board/freescale/mpc8572ds/ddr.c b/board/freescale/mpc8572ds/ddr.c
index a7ff668b1b..52e4f4224c 100644
--- a/board/freescale/mpc8572ds/ddr.c
+++ b/board/freescale/mpc8572ds/ddr.c
@@ -17,7 +17,7 @@ struct board_specific_parameters {
u32 clk_adjust;
u32 cpo;
u32 write_data_delay;
- u32 force_2T;
+ u32 force_2t;
};
/*
@@ -139,7 +139,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
popts->cpo_override = pbsp->cpo;
popts->write_data_delay =
pbsp->write_data_delay;
- popts->twoT_en = pbsp->force_2T;
+ popts->twot_en = pbsp->force_2t;
goto found;
}
pbsp_highest = pbsp;
@@ -155,7 +155,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
popts->clk_adjust = pbsp->clk_adjust;
popts->cpo_override = pbsp->cpo;
popts->write_data_delay = pbsp->write_data_delay;
- popts->twoT_en = pbsp->force_2T;
+ popts->twot_en = pbsp->force_2t;
} else {
panic("DIMM is not supported by this board");
}
diff --git a/board/freescale/mpc8610hpcd/ddr.c b/board/freescale/mpc8610hpcd/ddr.c
index 94219b9471..6cf9bc1d75 100644
--- a/board/freescale/mpc8610hpcd/ddr.c
+++ b/board/freescale/mpc8610hpcd/ddr.c
@@ -49,7 +49,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
popts->write_data_delay = 3;
/* 2T timing enable */
- popts->twoT_en = 1;
+ popts->twot_en = 1;
/*
* Factors to consider for half-strength driver enable:
diff --git a/board/freescale/mpc8641hpcn/ddr.c b/board/freescale/mpc8641hpcn/ddr.c
index 5d3575738a..651652a77d 100644
--- a/board/freescale/mpc8641hpcn/ddr.c
+++ b/board/freescale/mpc8641hpcn/ddr.c
@@ -106,5 +106,5 @@ void fsl_ddr_board_options(memctl_options_t *popts,
found:
/* 2T timing enable */
- popts->twoT_en = 1;
+ popts->twot_en = 1;
}
diff --git a/board/freescale/p1010rdb/ddr.c b/board/freescale/p1010rdb/ddr.c
index 681f052e41..ab1b41d832 100644
--- a/board/freescale/p1010rdb/ddr.c
+++ b/board/freescale/p1010rdb/ddr.c
@@ -172,20 +172,20 @@ dimm_params_t ddr_raw_timing = {
.edc_config = 0,
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1875,
- .caslat_X = 0x1e << 4, /* 5,6,7,8 */
- .tAA_ps = 13125,
- .tWR_ps = 15000,
- .tRCD_ps = 13125,
- .tRRD_ps = 7500,
- .tRP_ps = 13125,
- .tRAS_ps = 37500,
- .tRC_ps = 50625,
- .tRFC_ps = 160000,
- .tWTR_ps = 7500,
- .tRTP_ps = 7500,
+ .tckmin_x_ps = 1875,
+ .caslat_x = 0x1e << 4, /* 5,6,7,8 */
+ .taa_ps = 13125,
+ .twr_ps = 15000,
+ .trcd_ps = 13125,
+ .trrd_ps = 7500,
+ .trp_ps = 13125,
+ .tras_ps = 37500,
+ .trc_ps = 50625,
+ .trfc_ps = 160000,
+ .twtr_ps = 7500,
+ .trtp_ps = 7500,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 37500,
+ .tfaw_ps = 37500,
};
int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
diff --git a/board/freescale/p1022ds/ddr.c b/board/freescale/p1022ds/ddr.c
index a639861dae..94d2c2b0db 100644
--- a/board/freescale/p1022ds/ddr.c
+++ b/board/freescale/p1022ds/ddr.c
@@ -17,7 +17,7 @@ struct board_specific_parameters {
u32 clk_adjust; /* Range: 0-8 */
u32 cpo; /* Range: 2-31 */
u32 write_data_delay; /* Range: 0-6 */
- u32 force_2T;
+ u32 force_2t;
};
/*
@@ -72,7 +72,7 @@ void fsl_ddr_board_options(memctl_options_t *popts, dimm_params_t *pdimm,
popts->cpo_override = pbsp->cpo;
popts->write_data_delay =
pbsp->write_data_delay;
- popts->twoT_en = pbsp->force_2T;
+ popts->twot_en = pbsp->force_2t;
goto found;
}
pbsp_highest = pbsp;
@@ -88,7 +88,7 @@ void fsl_ddr_board_options(memctl_options_t *popts, dimm_params_t *pdimm,
popts->clk_adjust = pbsp->clk_adjust;
popts->cpo_override = pbsp->cpo;
popts->write_data_delay = pbsp->write_data_delay;
- popts->twoT_en = pbsp->force_2T;
+ popts->twot_en = pbsp->force_2t;
} else {
panic("DIMM is not supported by this board");
}
diff --git a/board/freescale/p1023rdb/ddr.c b/board/freescale/p1023rdb/ddr.c
index f027885100..9fb61fdab3 100644
--- a/board/freescale/p1023rdb/ddr.c
+++ b/board/freescale/p1023rdb/ddr.c
@@ -33,20 +33,20 @@ dimm_params_t ddr_raw_timing = {
.edc_config = 0,
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1875,
- .caslat_X = 0x1e << 4, /* 5,6,7,8 */
- .tAA_ps = 13125,
- .tWR_ps = 18000,
- .tRCD_ps = 13125,
- .tRRD_ps = 7500,
- .tRP_ps = 13125,
- .tRAS_ps = 37500,
- .tRC_ps = 50625,
- .tRFC_ps = 160000,
- .tWTR_ps = 7500,
- .tRTP_ps = 7500,
+ .tckmin_x_ps = 1875,
+ .caslat_x = 0x1e << 4, /* 5,6,7,8 */
+ .taa_ps = 13125,
+ .twr_ps = 18000,
+ .trcd_ps = 13125,
+ .trrd_ps = 7500,
+ .trp_ps = 13125,
+ .tras_ps = 37500,
+ .trc_ps = 50625,
+ .trfc_ps = 160000,
+ .twtr_ps = 7500,
+ .trtp_ps = 7500,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 37500,
+ .tfaw_ps = 37500,
};
int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c b/board/freescale/p1_p2_rdb_pc/ddr.c
index c0b72e035e..81cc0930bc 100644
--- a/board/freescale/p1_p2_rdb_pc/ddr.c
+++ b/board/freescale/p1_p2_rdb_pc/ddr.c
@@ -34,20 +34,20 @@ dimm_params_t ddr_raw_timing = {
.edc_config = 0,
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1870,
- .caslat_X = 0x1e << 4, /* 5,6,7,8 */
- .tAA_ps = 13125,
- .tWR_ps = 15000,
- .tRCD_ps = 13125,
- .tRRD_ps = 7500,
- .tRP_ps = 13125,
- .tRAS_ps = 37500,
- .tRC_ps = 50625,
- .tRFC_ps = 160000,
- .tWTR_ps = 7500,
- .tRTP_ps = 7500,
+ .tckmin_x_ps = 1870,
+ .caslat_x = 0x1e << 4, /* 5,6,7,8 */
+ .taa_ps = 13125,
+ .twr_ps = 15000,
+ .trcd_ps = 13125,
+ .trrd_ps = 7500,
+ .trp_ps = 13125,
+ .tras_ps = 37500,
+ .trc_ps = 50625,
+ .trfc_ps = 160000,
+ .twtr_ps = 7500,
+ .trtp_ps = 7500,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 37500,
+ .tfaw_ps = 37500,
};
#elif defined(CONFIG_P2020RDB)
/* Micron MT41J128M16_15E */
@@ -65,20 +65,20 @@ dimm_params_t ddr_raw_timing = {
.edc_config = 0,
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1500,
- .caslat_X = 0x7e << 4, /* 5,6,7,8,9,10 */
- .tAA_ps = 13500,
- .tWR_ps = 15000,
- .tRCD_ps = 13500,
- .tRRD_ps = 6000,
- .tRP_ps = 13500,
- .tRAS_ps = 36000,
- .tRC_ps = 49500,
- .tRFC_ps = 160000,
- .tWTR_ps = 7500,
- .tRTP_ps = 7500,
+ .tckmin_x_ps = 1500,
+ .caslat_x = 0x7e << 4, /* 5,6,7,8,9,10 */
+ .taa_ps = 13500,
+ .twr_ps = 15000,
+ .trcd_ps = 13500,
+ .trrd_ps = 6000,
+ .trp_ps = 13500,
+ .tras_ps = 36000,
+ .trc_ps = 49500,
+ .trfc_ps = 160000,
+ .twtr_ps = 7500,
+ .trtp_ps = 7500,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 30000,
+ .tfaw_ps = 30000,
};
#elif (defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD))
/* Micron MT41J512M8_187E */
@@ -96,20 +96,20 @@ dimm_params_t ddr_raw_timing = {
.edc_config = 0,
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1870,
- .caslat_X = 0x1e << 4, /* 5,6,7,8 */
- .tAA_ps = 13125,
- .tWR_ps = 15000,
- .tRCD_ps = 13125,
- .tRRD_ps = 7500,
- .tRP_ps = 13125,
- .tRAS_ps = 37500,
- .tRC_ps = 50625,
- .tRFC_ps = 160000,
- .tWTR_ps = 7500,
- .tRTP_ps = 7500,
+ .tckmin_x_ps = 1870,
+ .caslat_x = 0x1e << 4, /* 5,6,7,8 */
+ .taa_ps = 13125,
+ .twr_ps = 15000,
+ .trcd_ps = 13125,
+ .trrd_ps = 7500,
+ .trp_ps = 13125,
+ .tras_ps = 37500,
+ .trc_ps = 50625,
+ .trfc_ps = 160000,
+ .twtr_ps = 7500,
+ .trtp_ps = 7500,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 37500,
+ .tfaw_ps = 37500,
};
#elif defined(CONFIG_P1020RDB_PC)
/*
@@ -133,20 +133,20 @@ dimm_params_t ddr_raw_timing = {
.edc_config = 0,
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1875,
- .caslat_X = 0x1e << 4, /* 5,6,7,8 */
- .tAA_ps = 13125,
- .tWR_ps = 15000,
- .tRCD_ps = 13125,
- .tRRD_ps = 7500,
- .tRP_ps = 13125,
- .tRAS_ps = 37500,
- .tRC_ps = 50625,
- .tRFC_ps = 160000,
- .tWTR_ps = 7500,
- .tRTP_ps = 7500,
+ .tckmin_x_ps = 1875,
+ .caslat_x = 0x1e << 4, /* 5,6,7,8 */
+ .taa_ps = 13125,
+ .twr_ps = 15000,
+ .trcd_ps = 13125,
+ .trrd_ps = 7500,
+ .trp_ps = 13125,
+ .tras_ps = 37500,
+ .trc_ps = 50625,
+ .trfc_ps = 160000,
+ .twtr_ps = 7500,
+ .trtp_ps = 7500,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 37500,
+ .tfaw_ps = 37500,
};
#elif defined(CONFIG_P1024RDB) || \
defined(CONFIG_P1025RDB)
@@ -171,20 +171,20 @@ dimm_params_t ddr_raw_timing = {
.edc_config = 0,
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1500,
- .caslat_X = 0x3e << 4, /* 5,6,7,8,9 */
- .tAA_ps = 13125,
- .tWR_ps = 15000,
- .tRCD_ps = 13125,
- .tRRD_ps = 6000,
- .tRP_ps = 13125,
- .tRAS_ps = 36000,
- .tRC_ps = 49125,
- .tRFC_ps = 160000,
- .tWTR_ps = 7500,
- .tRTP_ps = 7500,
+ .tckmin_x_ps = 1500,
+ .caslat_x = 0x3e << 4, /* 5,6,7,8,9 */
+ .taa_ps = 13125,
+ .twr_ps = 15000,
+ .trcd_ps = 13125,
+ .trrd_ps = 6000,
+ .trp_ps = 13125,
+ .tras_ps = 36000,
+ .trc_ps = 49125,
+ .trfc_ps = 160000,
+ .twtr_ps = 7500,
+ .trtp_ps = 7500,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 30000,
+ .tfaw_ps = 30000,
};
#else
#error Missing raw timing data for this board
diff --git a/board/freescale/p2020ds/ddr.c b/board/freescale/p2020ds/ddr.c
index 59034f9f89..b12141f296 100644
--- a/board/freescale/p2020ds/ddr.c
+++ b/board/freescale/p2020ds/ddr.c
@@ -17,7 +17,7 @@ struct board_specific_parameters {
u32 clk_adjust;
u32 cpo;
u32 write_data_delay;
- u32 force_2T;
+ u32 force_2t;
};
@@ -90,7 +90,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
popts->cpo_override = pbsp->cpo;
popts->write_data_delay =
pbsp->write_data_delay;
- popts->twoT_en = pbsp->force_2T;
+ popts->twot_en = pbsp->force_2t;
goto found;
}
pbsp_highest = pbsp;
@@ -106,7 +106,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
popts->clk_adjust = pbsp_highest->clk_adjust;
popts->cpo_override = pbsp_highest->cpo;
popts->write_data_delay = pbsp_highest->write_data_delay;
- popts->twoT_en = pbsp_highest->force_2T;
+ popts->twot_en = pbsp_highest->force_2t;
} else {
panic("DIMM is not supported by this board");
}
diff --git a/board/freescale/p2041rdb/ddr.c b/board/freescale/p2041rdb/ddr.c
index 6d9a5de1c5..cc1bfae394 100644
--- a/board/freescale/p2041rdb/ddr.c
+++ b/board/freescale/p2041rdb/ddr.c
@@ -21,7 +21,7 @@ struct board_specific_parameters {
u32 wrlvl_start;
u32 cpo;
u32 write_data_delay;
- u32 force_2T;
+ u32 force_2t;
};
/*
@@ -76,7 +76,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
pbsp->write_data_delay;
popts->clk_adjust = pbsp->clk_adjust;
popts->wrlvl_start = pbsp->wrlvl_start;
- popts->twoT_en = pbsp->force_2T;
+ popts->twot_en = pbsp->force_2t;
goto found;
}
pbsp_highest = pbsp;
@@ -93,7 +93,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
popts->write_data_delay = pbsp_highest->write_data_delay;
popts->clk_adjust = pbsp_highest->clk_adjust;
popts->wrlvl_start = pbsp_highest->wrlvl_start;
- popts->twoT_en = pbsp_highest->force_2T;
+ popts->twot_en = pbsp_highest->force_2t;
} else {
panic("DIMM is not supported by this board");
}
diff --git a/board/freescale/t4qds/ddr.c b/board/freescale/t4qds/ddr.c
index 26ac2a54d2..d70c31051d 100644
--- a/board/freescale/t4qds/ddr.c
+++ b/board/freescale/t4qds/ddr.c
@@ -56,7 +56,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
popts->wrlvl_start = pbsp->wrlvl_start;
popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;
popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;
- popts->twoT_en = pbsp->force_2T;
+ popts->twot_en = pbsp->force_2t;
goto found;
}
pbsp_highest = pbsp;
@@ -75,7 +75,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
popts->wrlvl_start = pbsp_highest->wrlvl_start;
popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;
popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;
- popts->twoT_en = pbsp_highest->force_2T;
+ popts->twot_en = pbsp_highest->force_2t;
} else {
panic("DIMM is not supported by this board");
}
diff --git a/board/freescale/t4qds/ddr.h b/board/freescale/t4qds/ddr.h
index d0a0951af9..8183af78fe 100644
--- a/board/freescale/t4qds/ddr.h
+++ b/board/freescale/t4qds/ddr.h
@@ -16,7 +16,7 @@ struct board_specific_parameters {
u32 wrlvl_ctl_3;
u32 cpo;
u32 write_data_delay;
- u32 force_2T;
+ u32 force_2t;
};
/*
generated by cgit (git 2.34.1) at 2024-12-24 13:06:35 +0000