diff options
Diffstat (limited to 'board/freescale')
-rw-r--r-- | board/freescale/ls1012afrdm/ls1012afrdm.c | 35 | ||||
-rw-r--r-- | board/freescale/ls1012aqds/ls1012aqds.c | 36 | ||||
-rw-r--r-- | board/freescale/ls1012ardb/ls1012ardb.c | 35 | ||||
-rw-r--r-- | board/freescale/ls1021aqds/ddr.c | 3 |
4 files changed, 109 insertions, 0 deletions
diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c b/board/freescale/ls1012afrdm/ls1012afrdm.c index b03bdb82c6..789cae225b 100644 --- a/board/freescale/ls1012afrdm/ls1012afrdm.c +++ b/board/freescale/ls1012afrdm/ls1012afrdm.c @@ -9,6 +9,9 @@ #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/fsl_serdes.h> +#ifdef CONFIG_FSL_LS_PPA +#include <asm/arch/ppa.h> +#endif #include <asm/arch/soc.h> #include <hwconfig.h> #include <environment.h> @@ -74,6 +77,9 @@ int board_init(void) gd->env_addr = (ulong)&default_environment[0]; #endif +#ifdef CONFIG_FSL_LS_PPA + ppa_init(); +#endif return 0; } @@ -85,3 +91,32 @@ int ft_board_setup(void *blob, bd_t *bd) return 0; } + +void dram_init_banksize(void) +{ + /* + * gd->arch.secure_ram tracks the location of secure memory. + * It was set as if the memory starts from 0. + * The address needs to add the offset of its bank. + */ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + if (gd->ram_size > CONFIG_SYS_DDR_BLOCK1_SIZE) { + gd->bd->bi_dram[0].size = CONFIG_SYS_DDR_BLOCK1_SIZE; + gd->bd->bi_dram[1].start = CONFIG_SYS_DDR_BLOCK2_BASE; + gd->bd->bi_dram[1].size = gd->ram_size - + CONFIG_SYS_DDR_BLOCK1_SIZE; +#ifdef CONFIG_SYS_MEM_RESERVE_SECURE + gd->arch.secure_ram = gd->bd->bi_dram[1].start + + gd->arch.secure_ram - + CONFIG_SYS_DDR_BLOCK1_SIZE; + gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED; +#endif + } else { + gd->bd->bi_dram[0].size = gd->ram_size; +#ifdef CONFIG_SYS_MEM_RESERVE_SECURE + gd->arch.secure_ram = gd->bd->bi_dram[0].start + + gd->arch.secure_ram; + gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED; +#endif + } +} diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c index 88fb4ce99b..4281790426 100644 --- a/board/freescale/ls1012aqds/ls1012aqds.c +++ b/board/freescale/ls1012aqds/ls1012aqds.c @@ -10,6 +10,9 @@ #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/fsl_serdes.h> +#ifdef CONFIG_FSL_LS_PPA +#include <asm/arch/ppa.h> +#endif #include <asm/arch/fdt.h> #include <asm/arch/soc.h> #include <ahci.h> @@ -113,6 +116,10 @@ int board_init(void) #ifdef CONFIG_ENV_IS_NOWHERE gd->env_addr = (ulong)&default_environment[0]; #endif + +#ifdef CONFIG_FSL_LS_PPA + ppa_init(); +#endif return 0; } @@ -159,3 +166,32 @@ int ft_board_setup(void *blob, bd_t *bd) return 0; } #endif + +void dram_init_banksize(void) +{ + /* + * gd->arch.secure_ram tracks the location of secure memory. + * It was set as if the memory starts from 0. + * The address needs to add the offset of its bank. + */ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + if (gd->ram_size > CONFIG_SYS_DDR_BLOCK1_SIZE) { + gd->bd->bi_dram[0].size = CONFIG_SYS_DDR_BLOCK1_SIZE; + gd->bd->bi_dram[1].start = CONFIG_SYS_DDR_BLOCK2_BASE; + gd->bd->bi_dram[1].size = gd->ram_size - + CONFIG_SYS_DDR_BLOCK1_SIZE; +#ifdef CONFIG_SYS_MEM_RESERVE_SECURE + gd->arch.secure_ram = gd->bd->bi_dram[1].start + + gd->arch.secure_ram - + CONFIG_SYS_DDR_BLOCK1_SIZE; + gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED; +#endif + } else { + gd->bd->bi_dram[0].size = gd->ram_size; +#ifdef CONFIG_SYS_MEM_RESERVE_SECURE + gd->arch.secure_ram = gd->bd->bi_dram[0].start + + gd->arch.secure_ram; + gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED; +#endif + } +} diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c index 65fa94c618..e3a8a7631b 100644 --- a/board/freescale/ls1012ardb/ls1012ardb.c +++ b/board/freescale/ls1012ardb/ls1012ardb.c @@ -9,6 +9,9 @@ #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/fsl_serdes.h> +#ifdef CONFIG_FSL_LS_PPA +#include <asm/arch/ppa.h> +#endif #include <asm/arch/soc.h> #include <hwconfig.h> #include <ahci.h> @@ -110,6 +113,9 @@ int board_init(void) gd->env_addr = (ulong)&default_environment[0]; #endif +#ifdef CONFIG_FSL_LS_PPA + ppa_init(); +#endif return 0; } @@ -159,3 +165,32 @@ int ft_board_setup(void *blob, bd_t *bd) return 0; } + +void dram_init_banksize(void) +{ + /* + * gd->secure_ram tracks the location of secure memory. + * It was set as if the memory starts from 0. + * The address needs to add the offset of its bank. + */ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + if (gd->ram_size > CONFIG_SYS_DDR_BLOCK1_SIZE) { + gd->bd->bi_dram[0].size = CONFIG_SYS_DDR_BLOCK1_SIZE; + gd->bd->bi_dram[1].start = CONFIG_SYS_DDR_BLOCK2_BASE; + gd->bd->bi_dram[1].size = gd->ram_size - + CONFIG_SYS_DDR_BLOCK1_SIZE; +#ifdef CONFIG_SYS_MEM_RESERVE_SECURE + gd->arch.secure_ram = gd->bd->bi_dram[1].start + + gd->arch.secure_ram - + CONFIG_SYS_DDR_BLOCK1_SIZE; + gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED; +#endif + } else { + gd->bd->bi_dram[0].size = gd->ram_size; +#ifdef CONFIG_SYS_MEM_RESERVE_SECURE + gd->arch.secure_ram = gd->bd->bi_dram[0].start + + gd->arch.secure_ram; + gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED; +#endif + } +} diff --git a/board/freescale/ls1021aqds/ddr.c b/board/freescale/ls1021aqds/ddr.c index 6435bf9ad1..2f66ba9e7f 100644 --- a/board/freescale/ls1021aqds/ddr.c +++ b/board/freescale/ls1021aqds/ddr.c @@ -96,6 +96,9 @@ found: #else popts->cswl_override = DDR_CSWL_CS0; + /* optimize cpo for erratum A-009942 */ + popts->cpo_sample = 0x58; + /* DHC_EN =1, ODT = 75 Ohm */ popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm); popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm); |