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-rw-r--r--board/nvidia/dts/tegra114-dalmore.dts2
-rw-r--r--board/nvidia/dts/tegra20-harmony.dts18
-rw-r--r--board/nvidia/dts/tegra20-seaboard.dts12
-rw-r--r--board/nvidia/dts/tegra20-ventana.dts15
-rw-r--r--board/nvidia/dts/tegra20-whistler.dts13
-rw-r--r--board/nvidia/dts/tegra30-cardhu.dts2
6 files changed, 56 insertions, 6 deletions
diff --git a/board/nvidia/dts/tegra114-dalmore.dts b/board/nvidia/dts/tegra114-dalmore.dts
index 27a4a07206..3e1e1eaff8 100644
--- a/board/nvidia/dts/tegra114-dalmore.dts
+++ b/board/nvidia/dts/tegra114-dalmore.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-#include ARCH_CPU_DTS
+#include "tegra114.dtsi"
/ {
model = "NVIDIA Dalmore";
diff --git a/board/nvidia/dts/tegra20-harmony.dts b/board/nvidia/dts/tegra20-harmony.dts
index 9fc7c0db90..7934e4a897 100644
--- a/board/nvidia/dts/tegra20-harmony.dts
+++ b/board/nvidia/dts/tegra20-harmony.dts
@@ -9,6 +9,8 @@
aliases {
usb0 = "/usb@c5008000";
usb1 = "/usb@c5004000";
+ sdhci0 = "/sdhci@c8000600";
+ sdhci1 = "/sdhci@c8000200";
};
memory {
@@ -52,4 +54,20 @@
usb@c5004000 {
nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
};
+
+ sdhci@c8000200 {
+ status = "okay";
+ cd-gpios = <&gpio 69 1>; /* gpio PI5 */
+ wp-gpios = <&gpio 57 0>; /* gpio PH1 */
+ power-gpios = <&gpio 155 0>; /* gpio PT3 */
+ bus-width = <4>;
+ };
+
+ sdhci@c8000600 {
+ status = "okay";
+ cd-gpios = <&gpio 58 1>; /* gpio PH2 */
+ wp-gpios = <&gpio 59 0>; /* gpio PH3 */
+ power-gpios = <&gpio 70 0>; /* gpio PI6 */
+ bus-width = <8>;
+ };
};
diff --git a/board/nvidia/dts/tegra20-seaboard.dts b/board/nvidia/dts/tegra20-seaboard.dts
index a73db36f1e..12cb0bc780 100644
--- a/board/nvidia/dts/tegra20-seaboard.dts
+++ b/board/nvidia/dts/tegra20-seaboard.dts
@@ -12,14 +12,15 @@
};
aliases {
- /* This defines the order of our USB ports */
+ /* This defines the order of our ports */
usb0 = "/usb@c5008000";
usb1 = "/usb@c5000000";
-
i2c0 = "/i2c@7000d000";
i2c1 = "/i2c@7000c000";
i2c2 = "/i2c@7000c400";
i2c3 = "/i2c@7000c500";
+ sdhci0 = "/sdhci@c8000600";
+ sdhci1 = "/sdhci@c8000400";
};
memory {
@@ -156,13 +157,16 @@
};
sdhci@c8000400 {
- cd-gpios = <&gpio 69 0>; /* gpio PI5 */
+ status = "okay";
+ cd-gpios = <&gpio 69 1>; /* gpio PI5 */
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
power-gpios = <&gpio 70 0>; /* gpio PI6 */
+ bus-width = <4>;
};
sdhci@c8000600 {
- support-8bit;
+ status = "okay";
+ bus-width = <8>;
};
lcd_panel: panel {
diff --git a/board/nvidia/dts/tegra20-ventana.dts b/board/nvidia/dts/tegra20-ventana.dts
index ffc71b2778..e1a3d1ec91 100644
--- a/board/nvidia/dts/tegra20-ventana.dts
+++ b/board/nvidia/dts/tegra20-ventana.dts
@@ -8,6 +8,8 @@
aliases {
usb0 = "/usb@c5008000";
+ sdhci0 = "/sdhci@c8000600";
+ sdhci1 = "/sdhci@c8000400";
};
memory {
@@ -41,4 +43,17 @@
usb@c5004000 {
status = "disabled";
};
+
+ sdhci@c8000400 {
+ status = "okay";
+ cd-gpios = <&gpio 69 1>; /* gpio PI5 */
+ wp-gpios = <&gpio 57 0>; /* gpio PH1 */
+ power-gpios = <&gpio 70 0>; /* gpio PI6 */
+ bus-width = <4>;
+ };
+
+ sdhci@c8000600 {
+ status = "okay";
+ bus-width = <8>;
+ };
};
diff --git a/board/nvidia/dts/tegra20-whistler.dts b/board/nvidia/dts/tegra20-whistler.dts
index 1f09e5e7dd..eb92264f9d 100644
--- a/board/nvidia/dts/tegra20-whistler.dts
+++ b/board/nvidia/dts/tegra20-whistler.dts
@@ -9,6 +9,8 @@
aliases {
i2c0 = "/i2c@7000d000";
usb0 = "/usb@c5008000";
+ sdhci0 = "/sdhci@c8000600";
+ sdhci1 = "/sdhci@c8000400";
};
memory {
@@ -57,4 +59,15 @@
usb@c5004000 {
status = "disabled";
};
+
+ sdhci@c8000400 {
+ status = "okay";
+ wp-gpios = <&gpio 173 0>; /* gpio PV5 */
+ bus-width = <8>;
+ };
+
+ sdhci@c8000600 {
+ status = "okay";
+ bus-width = <8>;
+ };
};
diff --git a/board/nvidia/dts/tegra30-cardhu.dts b/board/nvidia/dts/tegra30-cardhu.dts
index f7ea07af84..8ad1fb70ef 100644
--- a/board/nvidia/dts/tegra30-cardhu.dts
+++ b/board/nvidia/dts/tegra30-cardhu.dts
@@ -1,7 +1,7 @@
/dts-v1/;
/memreserve/ 0x1c000000 0x04000000;
-#include ARCH_CPU_DTS
+#include "tegra30.dtsi"
/ {
model = "NVIDIA Cardhu";